Book contents
- Frontmatter
- Contents
- Foreword
- Preface
- List of Abbreviations
- List of Symbols
- 1 Introduction
- 2 Review on Modeling Junctionless FETs
- 3 The EPFL Charge-based Model of Junctionless Field-Effect Transistors
- 4 Model-Driven Design-Space of Junctionless FETs
- 5 Generalization of the Charge-based Model: Accounting for Inversion Layers
- 6 Predicted Performances of Junctionless FETs
- 7 Short-Channel Effects in Symmetric Junctionless Double-Gate FETs
- 8 Modeling AC Operation in Symmetric Double-Gate and Nanowire JL FETs
- 9 Modeling Asymmetric Operation of Double-Gate Junctionless FETs
- 10 Modeling Noise Behavior in Junctionless FETs
- 11 Carrier Mobility Extraction Methodology in JL and Inversion-Mode FETs
- 12 Revisiting the Junction FET: A Junctionless FET with an ∞ Gate Capacitance
- 13 Modeling Junctionless FET with Interface Traps Targeting Biosensor Applications
- Appendix A Design-Space of Twin-Gate Junctionless Vertical Slit FETs
- Appendix B Transient Off-Current in Junctionless FETs
- Appendix C Derivatives of Mobile Charge Density with Respect to V GS and V DS
- Appendix D Global Charge Density at Drain in Depletion Mode
- Appendix E Global Charge Density at Drain in Accumulation Mode
- Appendix F The EPFL Junctionless MODEL
- References
- Index
Frontmatter
Published online by Cambridge University Press: 24 February 2018
Book contents
- Frontmatter
- Contents
- Foreword
- Preface
- List of Abbreviations
- List of Symbols
- 1 Introduction
- 2 Review on Modeling Junctionless FETs
- 3 The EPFL Charge-based Model of Junctionless Field-Effect Transistors
- 4 Model-Driven Design-Space of Junctionless FETs
- 5 Generalization of the Charge-based Model: Accounting for Inversion Layers
- 6 Predicted Performances of Junctionless FETs
- 7 Short-Channel Effects in Symmetric Junctionless Double-Gate FETs
- 8 Modeling AC Operation in Symmetric Double-Gate and Nanowire JL FETs
- 9 Modeling Asymmetric Operation of Double-Gate Junctionless FETs
- 10 Modeling Noise Behavior in Junctionless FETs
- 11 Carrier Mobility Extraction Methodology in JL and Inversion-Mode FETs
- 12 Revisiting the Junction FET: A Junctionless FET with an ∞ Gate Capacitance
- 13 Modeling Junctionless FET with Interface Traps Targeting Biosensor Applications
- Appendix A Design-Space of Twin-Gate Junctionless Vertical Slit FETs
- Appendix B Transient Off-Current in Junctionless FETs
- Appendix C Derivatives of Mobile Charge Density with Respect to V GS and V DS
- Appendix D Global Charge Density at Drain in Depletion Mode
- Appendix E Global Charge Density at Drain in Accumulation Mode
- Appendix F The EPFL Junctionless MODEL
- References
- Index
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- Publisher: Cambridge University PressPrint publication year: 2018