Skip to main content Accessibility help

We use cookies to distinguish you from other users and to provide you with a better experience on our websites. Close this message to accept cookies or find out how to manage your cookie settings.

Close cookie message
×
Hostname: page-component-77c89778f8-fv566 Total loading time: 0 Render date: 2024-07-17T07:17:35.316Z Has data issue: false hasContentIssue false

7 - On-chip power-combining techniques for mm-wave silicon power amplifiers

Published online by Cambridge University Press:  05 April 2016

By
Tian-Wei Huang ,
Jeng-Han Tsai  and
Jin-Fu Yeh
Edited by
Hossein Hashemi  and
Sanjay Raman
Tian-Wei Huang
Affiliation:
National Taiwan University
Jeng-Han Tsai
Affiliation:
National Taiwan Normal University
Jin-Fu Yeh
Affiliation:
National Taiwan University
Hossein Hashemi
Affiliation:
University of Southern California
Sanjay Raman
Affiliation:
Virginia Polytechnic Institute and State University
Get access

Summary

On-chip power-combining techniques

Introduction

The millimeter-wave (mm-wave) silicon power amplifier (PA) can provide a cost-effective solution for many potential commercial applications, like 60-GHz Wi-Fi, 77-GHz car radar, or the future B4G/5G 10-Gbps cellular backhaul links. The output power requirements are distance dependent from short-range Wi-Fi using 10 dBm to long-range backhaul links with more than 20-dBm output power. Design and implementation of mm-wave PAs in advanced CMOS suffer from various challenges. Most of all, the capability of a mm-wave PA to deliver watt-level output power is restricted by the low supply voltage and the limited gain performance for large-size transistors at the mm-wave frequency band. Moreover, the thick gate devices cannot be employed in mm-wave PAs due to poor gain performance. Figure 7.1 shows the decreasing trend of supply voltage of the advanced CMOS processes.

To achieve effective mm-wave power combining, the advanced CMOS processes with multiple metal layers can provide design freedom for the layout symmetry and increased metal thickness by stacking multiple metals for loss reduction. As a result, power-combining techniques play an important role in mm-wave PA design.

Over the past decade, although the industry and academia have been devoted to developing monolithic mm-wave power-combining techniques to increase the output power, the mm-wave power-combining techniques are still challenging. The objective of this chapter is to provide the necessary background, design principles of the mm-wave power-combining techniques, and various case studies for the readers.

Performance indicators

In this section, we will introduce two performance indicators and their usages in the mm-wave power-combining techniques.

Area per way (mm2)

Generally, monolithic power-combining techniques in the literature are focused on how to generate maximum output power in a minimum chip area. As shown in Fig. 7.2, the chip area of multi-way combined PAs can be increased exponentially due to complicated multi-way power splitters and combiners. On the other hand, the output power has a saturation trend of multi-way combined PAs due to the increased loss in a multi-way power combiner.

As mentioned in the foregoing section, mm-wave PAs rely on the M-way power-combining techniques to deliver the high output power. Figure 7.3 plots the trends of the chip area of the CMOS mm-wave PAs in the literature [1–23]. As we observe from Fig. 7.3, the chip area grows significantly as the number of the combiner PA-cells increases.

Type
Chapter
Information
mm-Wave Silicon Power Amplifiers and Transmitters , pp. 257 - 301
Publisher: Cambridge University Press
Print publication year: 2016

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

[1] J. Y.-C., Liu, R., Berenguer, and M.-C. F., Chang, “Millimeter-wave self-healing power amplifier with adaptive amplitude and phase linearization in 65-nm CMOS,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 5, pp. 1342–1352, May 2012.Google Scholar
[2] T., Wang, T., Mitomo, N., Ono, and O., Watanabe, “A 55–67 GHz power amplifier with 13.6% PAE in 65 nm standard CMOS,” in RFIC Dig., June 2012.Google Scholar
[3] T., LaRocca and M. C. Frank, Chang, “60 GHz CMOS differential and transformer-coupled power amplifier for compact design,” in RFIC Dig., June 2008.Google Scholar
[4] W. L., Chan, J. R., Long, M., Spirito, and J. J., Pekarik, “A 60 GHz-band 1 V 11.5 dBm power amplifier with 11% PAE in 65 nm CMOS,” in ISSCC Dig. Tech. Papers, Feb. 2009, pp. 380–381.Google Scholar
[5] D., Chowdhury, P., Reynaert, and A. M., Niknejad, “A 60 GHz 1 V + 12.3 dBm transformercoupled wideband PA in 90 nm CMOS,” in ISSCC Dig. Tech. Papers, Feb. 2008, pp. 560–635.Google Scholar
[6] J. Y.-C., Liu, Q. J., Gu, A., Tang, N.-Y., Wang, and M.-C. Frank, Chang, “A 60 GHz tunable output profile power amplifier in 65 nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 7, pp. 377–379, July 2011.Google Scholar
[7] J., Chen and A. M., Niknejad, “A compact 1 V 18.6 dBm 60 GHz power amplifier in 65 nm CMOS,” in ISSCC Dig. Tech. Papers, Feb. 2011, pp. 432–433.Google Scholar
[8] L., Chen, L., Li, and T. J., Cui, “A 1 V 18 dBm 60 GHz power amplifier with 24 dB gain in 65 nm LP CMOS,” Asia-Pacific Microwave Conference (APMC), Dec. 2012.Google Scholar
[9] D., Zhao, S., Kulkarni, and P., Reynaert, “A 60 GHz outphasing transmitter in 40 nm CMOS with 15.6 dBm output power,” in ISSCC Dig. Tech. Papers, Feb. 2012, pp. 170–172.Google Scholar
[10] Y.-N., Jen, J.-H., Tsai, T.-W., Huang, and H., Wang, “Design and analysis of a 55–71- GHz compact and broadband distributed active transformer power amplifier in 90-nm CMOS process,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 7, pp. 1637–1646, July 2009.Google Scholar
[11] M., Bohsali and A. M., Niknejad, “Current combining 60 GHz CMOS power amplifier,” in RFIC Dig., June 2009.Google Scholar
[12] Y., Zhao, and J. R., Long, “A wideband, dual-path millimeter-wave power amplifier with 20 dBm output power and PAE above 15% in 130 nm SiGe-BiCMOS,” IEEE J. Solid-State Circuits, vol. 47, no. 9, pp. 1981–1997, Dec. 2012.Google Scholar
[13] J.-F., Yeh, J.-H., Tsai, and T.-W., Huang, “A 60-GHz power amplifier design using dual-radial symmetric architecture,” IEEE Trans. Microw. Theory Tech., vol. 61, no. 3, pp. 1280–1290, Mar. 2013.Google Scholar
[14] J.-W., Lai and A., Valdes-Garcia, “A 1 V 17.9 dBm 60 GHz power amplifier in standard 65 nm CMOS,” in ISSCC Dig. Tech. Papers, Feb. 2010, pp. 424–425.Google Scholar
[15] S., Aloui, B., Leite, N., Demirel, et al., “High-gain and linear 60-GHz power amplifier with a thin digital 65-nm CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 61, no. 6, pp. 2425–2437, June 2013.Google Scholar
[16] C. Y, Law and A.-V., Pham, “A high gain 60 GHz power amplifier with 20 dBm output power in 90 nm CMOS,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2010, pp. 426–427.Google Scholar
[17] U. R., Pfeiffer and D., Goren, “A 23-dBm 60-GHz distributed active transformer in a silicon process technology,” IEEE Trans. Micro-wave Theory Tech., vol. 55, no. 5, pp. 857–865, May 2007.
[18] V., Giammello, E., Ragonese, and G., Palmisano, “A 15-dBm SiGe BiCMOS PA for 77-GHz automotive radar,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 11, pp. 2910–2918, Nov. 2011.Google Scholar
[19] Z., Xu, Q. J., Gu, and M.-C. F., Chang, “A 100–117 GHz W-band CMOS power amplifier with on-chip adaptive biasing,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 10, pp. 547–649, July 2011.Google Scholar
[20] Q. J., Gu, Z., Xu, and M.-C. F., Chang, “Two-way current-combiningW-band power amplifier in 65-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 5, pp. 1365–1374, May 2012.Google Scholar
[21] N., Deferm, J. F., Osorio, A. de, Graauw, and P., Reynaert, “A 94 GHz differential power amplifier in 45 nm LP CMOS,” in RFIC Dig., June 2011.
[22] Y.-S., Jiang, J.-H., Tsai, and H., Wang, “AW-band medium power amplifier in 90 nm CMOS,” IEEE Microwave Wireless Comp. Lett., vol. 18, no. 12, pp. 818–820, Dec. 2008.Google Scholar
[23] K.-Y., Wang, T.-Y., Chang, and C.-K., Wang, “A 1 V 19.3 dBm 79 GHz power amplifier in 65 nm CMOS,” in ISSCC Dig. Tech. Papers, Feb. 2012, pp. 260–262.Google Scholar
[24] I., Aoki, S. D., Kee, D. B., Rutledge, and A., Hajimiri, “Fully integrated CMOS power amplifier design using the distributed active-transformer architecture,” IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 371–383, Mar. 2002.Google Scholar
[25] J.-F., Yeh, J.-H., Tsai, and T.-W., Huang, “A multi-mode 60-GHz power amplifier with a novel power combination technique,” in RFIC Dig., June 2012, pp. 61–64.Google Scholar
[26] Jing-Lin, Kuo, Yi-Fong, Lu, Ting-Yi, Huang, et al., “60-GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65-nm flipchip CMOS process,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 743–756, Mar. 2012.Google Scholar
[27] A. E. I., Lamminen, J., Saily, and A. R., Vimpar, “60-GHz patch antennas and arrays on LTCC with embedded-cavity substrates,” IEEE Trans. Antennas and Propagation, vol. 56, no. 9, pp. 2865–2874, Sep. 2008.Google Scholar
[28] Y.-N., Jen, J.-H., Tsai, C.-T., Peng, and T.-W., Huang, “A 20 to 24 GHz +16.8-dBm fully integrated power amplifier using 0.18-µm CMOS process,” IEEE Microwave and Wireless Components Letters, vol. 19, no. 1, pp. 42–44, Jan. 2009.Google Scholar
[29] T., Suzuki, Y., Kawano, M., Sato, T., Hirose, and K., Joshin, “60 and 77 GHz power amplifiers in standard 90 nm CMOS,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2008, pp. 562–573.Google Scholar
[30] C.-C., Hung, J.-L., Kuo, K.-Y., Lin, and H., Wang, “A 22.5-dB gain, 20.1-dBm output power K-band power amplifier in 0.18-µm CMOS,” IEEE RFIC Symp. Dig., pp. 557–560, May 2010.Google Scholar
[31] R. G., Freitag, “A modal analysis of MMIC power amplifier stability,” Proceedings of the 35th Midwest Symposium on Circuits and Systems, vol. 2, pp. 1012–1015, 1992.Google Scholar
[32] R. G., Freitag, “A unified analysis of MMIC power amplifier stability,” 1992 MTT-S International Microwave Symposium Digest, vol. 1, pp. 297–300, 1992.Google Scholar
[33] D. M., Pozar, Microwave Engineering, 3rd edn. Hoboken, NJ: Wiley, 2004.
[34] G., Gonzalez, Microwave Transistor Amplifiers Analysis and Design, 2nd edn. Upper Saddle River, NJ: Prentice-Hall, 1997.
[35] J., Lee, C.-C., Chen, J.-H., Tsai, K.-Y., Lin, and H., Wang, “A 68–83 GHz power amplifier in 90 nm CMOS,” in IEEE MTT-S Int. Microwave Symp. Dig., June 2009, pp. 437–440.Google Scholar
[36] A., Pallotta, W., Eyssa, L., Larcher, and R., Brama, “Millimeter-wave 14 dBm CMOS power amplifier with input–output distributed transformers,” in Proc. CICC, Sep. 2010, pp. 1–4.Google Scholar
[37] J., Essing, R., Mahmoudi, Pei, Yu, and A. van, Roermund, “A fully integrated 60 GHz distributed transformer power amplifier in bulky CMOS 45 nm,” in RFIC Dig., June 2011, pp. 1–4, 5–7.Google Scholar
[38] Z., Yi, J.R., Long, and M., Spirito, “A 60 GHz-band 20 dBm power amplifier with 20% peak PAE,” in RFIC Dig., June 2011, pp. 1–4, 5–7.Google Scholar
[39] J. P., Comeau, E.W., Thoenes, A., Imhoff, and M.A., Morton, “X-Band +24 dBm CMOS power amplifier with transformer power combining,” in SiRF Dig., Sep. 2010, pp. 49–52.Google Scholar
[40] B., Martineau, V., Knopik, A., Siligaris, F., Gianesello, and D., Belot, “A 53-to-68 GHz 18 dBm power amplifier with an 8-way combiner in standard 65 nm CMOS,” in ISSCC Dig. Tech. Papers, Feb. 2010, pp. 428–429.Google Scholar
[41] D., Sandstrom, B., Martineau, M., Varonen, et al., “94 GHz power-combining power amplifier with +13 dBm saturated output power in 65 nm CMOS,” in RFIC Dig., June 2011, pp. 1–4.Google Scholar
[42] M., Thian, M., Tiebout, N. B., Buchanan, V. F., Fusco, and F., Dielacher, “A 76–84 GHz SiGe power amplifier array employing low-loss four-way differential combining transformer,” IEEE Trans. Microw. Theory Techn., vol. 61, no. 2, pp. 931–938, Feb. 2013.Google Scholar
[43] A. M., Niknejad, D., Chowdhury, and J., Chen, “Design of CMOS power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 6, pp. 1784–1796, June 2012.Google Scholar
[44] D., Chowdhury, C. D., Hull, O. B., Degani, Y., Wang, and A.M., Niknejad, “A fully integrated dual-mode highly linear 2.4 GHz CMOS power amplifier for 4G WiMax applications,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3393–3402, Dec. 2009.Google Scholar
[45] G., Liu, P., Haldi, T.-J. King, Liu, and A.M.|Niknejad, “Fully integrated CMOS power amplifier with efficiency enhancement at power back-off,” IEEE J. Solid-State Circuits, vol. 43, no. 3, pp. 600–609, Mar. 2008.Google Scholar
[46] J., Kim, Y., Yoon, H., Kim, et al., “A linear multi-mode CMOS power amplifier with discrete resizing and concurrent power combining structure,” IEEE J. Solid-State Circuits, vol. 46, no. 5, pp. 1034–1048, May 2011.Google Scholar
[47] J., Kim, W., Kim, H., Jeon, et al., “A fully-integrated high-power linear CMOS power amplifier with a parallel-series combining transformer,” IEEE J. Solid-State Circuits, vol. 47, no. 3, pp. 599–614, Mar. 2012.Google Scholar
[48] A., Scuderi, C., Santagati, M., Vaiana, F., Pidala, and M., Paparo, “Balanced SiGe PA module for multi-band and multi-mode cellular-phone applications,” in ISSCC Dig. Tech. Papers, Feb. 2008, pp. 572–637.Google Scholar
[49] G., Hau and M., Singh, “Multi-mode WCDMA power amplifier module with improved lowpower efficiency using stage-bypass,” in RFIC Dig., May 2010, pp. 163–166.Google Scholar
[50] H., Jeon, Y., Park, Y.-Y., Huang, et al., “A triple-mode balanced linear CMOS power amplifier using a switched-quadrature coupler,” IEEE J. Solid-State Circuits, vol. 47, no. 9, pp. 2019– 2032, Sep. 2012.Google Scholar
[51] Y., Yoon, J., Kim, H., Kim, et al., “A dual-mode CMOS RF power amplifier with integrated tunable matching network,” IEEE Microw.Wireless Compon. Lett., vol. 60, no. 1, pp. 77–88, Jan. 2012.
[52] B., Koo, T., Joo, Y., Na, and S., Hong, “A fully integrated dual-mode CMOS power amplifier for WCDMA applications,” in ISSCC Dig. Tech. Papers, Feb. 2012, pp. 82–84.Google Scholar

Save book to Kindle

To save this book to your Kindle, first ensure [email protected] is added to your Approved Personal Document E-mail List under your Personal Document Settings on the Manage Your Content and Devices page of your Amazon account. Then enter the ‘name’ part of your Kindle email address below. Find out more about saving to your Kindle.

Note you can select to save to either the @free.kindle.com or @kindle.com variations. ‘@free.kindle.com’ emails are free but can only be saved to your device when it is connected to wi-fi. ‘@kindle.com’ emails can be delivered even when you are not connected to wi-fi, but note that service fees apply.

Find out more about the Kindle Personal Document Service.

Available formats
×

Save book to Dropbox

To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Dropbox.

Available formats
×

Save book to Google Drive

To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Google Drive.

Available formats
×