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Book contents
- Frontmatter
- Contents
- Preface
- Notation and Acronyms
- 1 Introduction to Wireline Communication
- 2 Electrical Channels
- 3 Decision Circuits
- 4 Equalization
- 5 Electrical-Link Transmitter Circuits
- 6 Electrical-Link Receiver Front-Ends
- 7 Optical Channels and Components
- 8 Optical-Link Transmitter Circuits
- 9 Optical Receivers
- 10 Low-Bandwidth (Equalizer-Based) Optical Receivers
- 11 Advanced Topics in Electrical and Optical Links
- 12 Overview of Synchronization Approaches
- 13 Oscillators
- 14 Phase-Locked Loops and Injection-Locked Oscillators
- 15 Clock and Data Recovery
- Appendix A Frequency Domain Analysis
- Appendix B Noise Analysis
- References
- Index
9 - Optical Receivers
Published online by Cambridge University Press: 05 December 2024
- Frontmatter
- Contents
- Preface
- Notation and Acronyms
- 1 Introduction to Wireline Communication
- 2 Electrical Channels
- 3 Decision Circuits
- 4 Equalization
- 5 Electrical-Link Transmitter Circuits
- 6 Electrical-Link Receiver Front-Ends
- 7 Optical Channels and Components
- 8 Optical-Link Transmitter Circuits
- 9 Optical Receivers
- 10 Low-Bandwidth (Equalizer-Based) Optical Receivers
- 11 Advanced Topics in Electrical and Optical Links
- 12 Overview of Synchronization Approaches
- 13 Oscillators
- 14 Phase-Locked Loops and Injection-Locked Oscillators
- 15 Clock and Data Recovery
- Appendix A Frequency Domain Analysis
- Appendix B Noise Analysis
- References
- Index
Summary
This chapter begins with a recapitulation of an optical link and what the general requirements of an optical receiver are. The discussion of optical receivers starts with a brief analysis of a passive current-voltage converter (i.e., a resistor) in terms of its gain, bandwidth and input-referred noise. This section proposes reasonable bandwidth requirements for optical receivers that do not use equalizers, so-called low-ISI systems. Open-loop and feedback amplifiers are considered. Additional amplification through main-amplifier design is explained, starting with the effect on bandwidth of cascading multiple first-order stages. Behaviour of second- and third-order systems are also presented. Examples of Cherry-Hooper, second-order active feedback and third-order active feedback as well as interleaving feedback are presented. CMOS inverter-based designs are discussed.
Keywords
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- Chapter
- Information
- Mixed-Signal CMOS for Wireline CommunicationTransistor-Level and System-Level Design Considerations, pp. 224 - 267Publisher: Cambridge University PressPrint publication year: 2024