
Book contents
- Frontmatter
- Contents
- Preface
- Notation and Acronyms
- 1 Introduction to Wireline Communication
- 2 Electrical Channels
- 3 Decision Circuits
- 4 Equalization
- 5 Electrical-Link Transmitter Circuits
- 6 Electrical-Link Receiver Front-Ends
- 7 Optical Channels and Components
- 8 Optical-Link Transmitter Circuits
- 9 Optical Receivers
- 10 Low-Bandwidth (Equalizer-Based) Optical Receivers
- 11 Advanced Topics in Electrical and Optical Links
- 12 Overview of Synchronization Approaches
- 13 Oscillators
- 14 Phase-Locked Loops and Injection-Locked Oscillators
- 15 Clock and Data Recovery
- Appendix A Frequency Domain Analysis
- Appendix B Noise Analysis
- References
- Index
4 - Equalization
Published online by Cambridge University Press: 05 December 2024
- Frontmatter
- Contents
- Preface
- Notation and Acronyms
- 1 Introduction to Wireline Communication
- 2 Electrical Channels
- 3 Decision Circuits
- 4 Equalization
- 5 Electrical-Link Transmitter Circuits
- 6 Electrical-Link Receiver Front-Ends
- 7 Optical Channels and Components
- 8 Optical-Link Transmitter Circuits
- 9 Optical Receivers
- 10 Low-Bandwidth (Equalizer-Based) Optical Receivers
- 11 Advanced Topics in Electrical and Optical Links
- 12 Overview of Synchronization Approaches
- 13 Oscillators
- 14 Phase-Locked Loops and Injection-Locked Oscillators
- 15 Clock and Data Recovery
- Appendix A Frequency Domain Analysis
- Appendix B Noise Analysis
- References
- Index
Summary
A central challenge in the design of electrical links is to compensate for frequency-dependent loss in the channel that introduces inter-symbol interference (ISI). This chapter presents the overall objectives of joint Tx/Rx equalization. The system-level operation of transmitter-side feed-forward equalizers (FFEs) is discussed. Circuit details are presented in Chapter 5. Receiver-side continuous-time linear equalizers (CTLEs) and finite-impulse-response (FIR) filters are discussed next, followed by decision-feedback equalizers (DFEs). DFEs differ from FFEs, CTLEs and FIRs in that they only remove ISI rather than attempt to invert the low-pass channel characteristic. With the growing trend toward ADC- based receivers, the implementation of DFEs and Rx FFEs is discussed in the analog domain and the digital domain. The topics in this chapter are also a relevant background for the sections in Chapter 10 that discuss TIAs for reduced bandwidth systems, where equalization is used to remove ISI from an intentionally bandwidth-limited optical receiver front-end.
Keywords
- Type
- Chapter
- Information
- Mixed-Signal CMOS for Wireline CommunicationTransistor-Level and System-Level Design Considerations, pp. 96 - 118Publisher: Cambridge University PressPrint publication year: 2024