Beginning with a discussion of receiver metrics, this chapter discusses electrical-link receiver implementation by first considering input termination and ESD capacitance mitigation. The receiver front-end has two main jobs. The first is to amplify the signal to levels that can be captured by a decision circuit and the second is to remove enough ISI such that low BER detection is possible. With the types of receive-side equalization already described at the system level in Chapter 4, this chapter focuses on their transistor-level implementation. Both CML and inverter-based circuits are presented.