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Book contents
- Frontmatter
- Contents
- Preface
- Notation and Acronyms
- 1 Introduction to Wireline Communication
- 2 Electrical Channels
- 3 Decision Circuits
- 4 Equalization
- 5 Electrical-Link Transmitter Circuits
- 6 Electrical-Link Receiver Front-Ends
- 7 Optical Channels and Components
- 8 Optical-Link Transmitter Circuits
- 9 Optical Receivers
- 10 Low-Bandwidth (Equalizer-Based) Optical Receivers
- 11 Advanced Topics in Electrical and Optical Links
- 12 Overview of Synchronization Approaches
- 13 Oscillators
- 14 Phase-Locked Loops and Injection-Locked Oscillators
- 15 Clock and Data Recovery
- Appendix A Frequency Domain Analysis
- Appendix B Noise Analysis
- References
- Index
2 - Electrical Channels
Published online by Cambridge University Press: 05 December 2024
- Frontmatter
- Contents
- Preface
- Notation and Acronyms
- 1 Introduction to Wireline Communication
- 2 Electrical Channels
- 3 Decision Circuits
- 4 Equalization
- 5 Electrical-Link Transmitter Circuits
- 6 Electrical-Link Receiver Front-Ends
- 7 Optical Channels and Components
- 8 Optical-Link Transmitter Circuits
- 9 Optical Receivers
- 10 Low-Bandwidth (Equalizer-Based) Optical Receivers
- 11 Advanced Topics in Electrical and Optical Links
- 12 Overview of Synchronization Approaches
- 13 Oscillators
- 14 Phase-Locked Loops and Injection-Locked Oscillators
- 15 Clock and Data Recovery
- Appendix A Frequency Domain Analysis
- Appendix B Noise Analysis
- References
- Index
Summary
Electrical-link design is challenging due to the frequency-dependent loss and reflections associated with electrical channels as well as cross-talk between nearby channels. The equations describing lossless and lossy transmission lines are introduced in this chapter, followed by a brief discussion of loss mechanisms. The characteristics of various channels are presented, along with the effect of wirebonds and packages. The goal of this chapter is to provide link designers with a methodology to estimate the overall pulse response of a channel consisting of a lossy transmission line and the relevant package and chip parasitic elements. Knowing the pulse response, a link designer can then contemplate and model the equalization (discussed in Chapter 4) needed to properly detect transmitted bits. This chapter is organized to discuss transmission-line fundamentals and then overall channels.
Keywords
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- Chapter
- Information
- Mixed-Signal CMOS for Wireline CommunicationTransistor-Level and System-Level Design Considerations, pp. 40 - 72Publisher: Cambridge University PressPrint publication year: 2024