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Mixed-Signal CMOS for Wireline Communication Published online by Cambridge University Press: 05 December 2024
Mixed-signal wireline receivers use sensitive, high-speed decision circuits to compare input signals to a well-defined threshold, allowing the decoding of received bits. This chapter gives the important metrics of these circuits and contrasts their operation against that of conventional D flip-flops. Two main classes of circuit are discussed, namely current-mode logic and sense-amplifier-based circuits. The basics of their operation are presented. Simulation strategies and offset compensation are discussed.
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