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Mixed-Signal CMOS for Wireline Communication Published online by Cambridge University Press: 05 December 2024
This chapter presents advanced topics that draw on the fundamentals of previous chapters. Section 11.1 presents how implementing PAM4 signalling impacts equalization and circuit design. A brief overview of DAC/ADC-based links, also known as DSP-based links, is presented in Section 11.2. A consequence of PAM4 signalling is a smaller vertical eye opening. A digital equalization technique known as “maximum likelihood sequence estimation” is discussed in Section 11.4.
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