Published online by Cambridge University Press: 05 November 2013
In this chapter we discuss conversion of discrete-time digital signals to the continuous-time or analogue domain. So far we have only investigated generation of digitally represented signals that are sampled in time and quantised in amplitude to a specific number of bits b. Accordingly, in an ideal convertor there are 2b equally spaced quantisation levels that follow an exact linear relationship with the input code. We call this process digital to analogue conversion, and it comprises several distinct sequentially connected processing functions that we consider in this chapter:
the digital to analogue convertor (DAC);
a glitch reduction stage, or ‘deglitcher’ (if required);
a typically low-pass reconstruction filter;
analogue post-processing (e.g. switched attenuation, DC offset control and output line driving).
Fundamentally, a DAC takes a b-bit digital input word and together with a reference voltage (or current) Vref computes a corresponding output voltage Vout or current iout, depending on its architecture. In effect, a DAC multiplies the reference voltage by a factor determined from the input word as a fraction of full-scale. Accordingly, the often overlooked DAC reference is a critical design consideration and for our present discussion we subsume it into the DAC function. There are many DAC architectures reported in the literature and available in ‘single chip form’ from commercial suppliers such as Analog Devices, Linear Technology and Texas Instruments.
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