Book contents
- Frontmatter
- Contents
- List of Algorithms
- Preface
- PART I PRELIMINARIES
- PART II COMBINATIONAL CIRCUITS
- 9 Representations of Boolean Functions by Formulas
- 10* The Digital Abstraction
- 11 Foundations of Combinational Circuits
- 12 Trees
- 13 Decoders and Encoders
- 14 Selectors and Shifters
- 15 Addition
- 16 Signed Addition
- PART III SYNCHRONOUS CIRCUITS
- PART IV A SIMPLIFIED DLX
- Bibliography
- Index
13 - Decoders and Encoders
from PART II - COMBINATIONAL CIRCUITS
Published online by Cambridge University Press: 05 November 2012
- Frontmatter
- Contents
- List of Algorithms
- Preface
- PART I PRELIMINARIES
- PART II COMBINATIONAL CIRCUITS
- 9 Representations of Boolean Functions by Formulas
- 10* The Digital Abstraction
- 11 Foundations of Combinational Circuits
- 12 Trees
- 13 Decoders and Encoders
- 14 Selectors and Shifters
- 15 Addition
- 16 Signed Addition
- PART III SYNCHRONOUS CIRCUITS
- PART IV A SIMPLIFIED DLX
- Bibliography
- Index
Summary
Consider the following problem. We need a combinational circuit that controls many devices numbered 0, 1, …, 2k − 1. At every moment, the circuit instructs exactly one device to work while the others must be inactive. The input to the circuit is a k-bit string that represents the number i of the device to be active. Now, the circuit has 2k outputs, one for each device, and only the ith output should equal 1; the other outputs must equal zero. How do we design such a circuit? The circuit described previously is known as a decoder. The circuit that implements the inverse Boolean function is called an encoder.
In this chapter, we specify and design decoders and encoders. We also prove that the combinational circuit are correct, namely, they satisfy the specification. Moreover, we prove that these designs are asymptotically optimal.
BUSES
We begin this section by describing what buses are. Consider a circuit that contains an adder and a register (a memory device). The output of the adder should be stored by the register. Suppose that the adder outputs 8 bits. This means that there are eight different wires that emanate from the output of the adder to the input of the register. These eight wires are distinct and must have distinct names. Instead of naming the wires a, b, c, …, we often use names such as a[0], a[1], …, a[7].
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- Information
- Digital Logic DesignA Rigorous Approach, pp. 184 - 200Publisher: Cambridge University PressPrint publication year: 2012