Book contents
- Frontmatter
- Contents
- Preface
- Acknowledgment
- 1 INTRODUCTION TO DIGITAL SYSTEMS ENGINEERING
- 2 PACKAGING OF DIGITAL SYSTEMS
- 3 MODELING AND ANALYSIS OF WIRES
- 4 CIRCUITS
- 5 POWER DISTRIBUTION
- 6 NOISE IN DIGITAL SYSTEMS
- 7 SIGNALING CONVENTIONS
- 8 ADVANCED SIGNALING TECHNIQUES
- 9 TIMING CONVENTIONS
- 10 SYNCHRONIZATION
- 11 SIGNALING CIRCUITS
- 12 TIMING CIRCUITS
- REFERENCES
- Index
10 - SYNCHRONIZATION
Published online by Cambridge University Press: 05 June 2012
- Frontmatter
- Contents
- Preface
- Acknowledgment
- 1 INTRODUCTION TO DIGITAL SYSTEMS ENGINEERING
- 2 PACKAGING OF DIGITAL SYSTEMS
- 3 MODELING AND ANALYSIS OF WIRES
- 4 CIRCUITS
- 5 POWER DISTRIBUTION
- 6 NOISE IN DIGITAL SYSTEMS
- 7 SIGNALING CONVENTIONS
- 8 ADVANCED SIGNALING TECHNIQUES
- 9 TIMING CONVENTIONS
- 10 SYNCHRONIZATION
- 11 SIGNALING CIRCUITS
- 12 TIMING CIRCUITS
- REFERENCES
- Index
Summary
Synchronization involves determining or enforcing an ordering of events on signals. It is necessary to synchronize, for example, when sampling an asynchronous signal with a clock. To define the signal value unambiguously during a particular clock cycle, one must determine whether a signal transition occurred before or after a clock transition. A similar form of synchronization is required when a signal that is synchronous to one clock is sampled by a different clock. In this case we say the signal is moving between clock domains and must be synchronized with the new domain. If the two clocks are periodic, we will see that synchronizing signals passing between clock domains is much less expensive than synchronizing truly asynchronous signals.
Whenever synchronization must be performed in a bounded amount of time, some probability exists of synchronization failure. That is, if the two events happen very close together, it may not be possible for a synchronizer circuit to resolve unambiguously which occurred first in a fixed amount of time. A properly designed synchronizer can make the probability of synchronization failure arbitrarily small by waiting arbitrarily long. However, several rather common mistakes can result in very high failure probabilities. It is possible to synchronize without any probability of failure, provided one is willing to wait as long as it takes for the synchronizer to signal that it has completed the task.
The difficulty of synchronizing a signal with a clock depends on the predictability of events on the signal relative to the clock.
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- Digital Systems Engineering , pp. 462 - 513Publisher: Cambridge University PressPrint publication year: 1998