Submission deadline: January 10, 2002
The past decade has seen dramatic growth in the application of model checking
techniques to the validation and verification of correctness properties of hardware,
and more recently software systems. One of the methods is to model a hardware
or software system as a finite, labelled transition system which is then exhaustively
explored to decide whether a given temporal specification holds. Recently, there has
been increasing interest in applying logic programming techniques to model checking
in particular and verification in general. For example, table-based logic programming
can be used as an efficient means of performing explicit model checking. Other
research has successfully exploited set-based logic program analysis, constraint logic
programming, and logic program transformation techniques.
The aim of this special issue is to attract high-quality research papers on the
interplay between verification techniques (e.g. model checking, reduction and abstraction)
and logic programming techniques (e.g. constraints, abstract interpretation, program
transformation).