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Fabrication of co-planar metal-insulator-metal solid state nanojunctions down to 5 nm

Published online by Cambridge University Press:  15 September 1999

S. Cholet ,
C. Joachim ,
J. P. Martinez  and
B. Rousset
S. Cholet
Affiliation:
CEMES-CNRS, 29 rue Jeanne Marvig, B.P. 4347, 31055 Toulouse Cedex, France
C. Joachim
Affiliation:
CEMES-CNRS, 29 rue Jeanne Marvig, B.P. 4347, 31055 Toulouse Cedex, France
J. P. Martinez
Affiliation:
CEMES-CNRS, 29 rue Jeanne Marvig, B.P. 4347, 31055 Toulouse Cedex, France
B. Rousset
Affiliation:
LAAS-CNRS, 7 avenue du Colonel Roche, 31077 Toulouse Cedex, France
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Abstract

An optimised process is presented to fabricate co-planar metal-insulator-metal nanojunctions down to an inter-electrode distance of 5 nm. Simulation of the e-beam insulation of the PMMA/SiO2/Si interface is used to optimise the PMMA resist thickness and the exposure strategy. The process was well stabilised to provide a full statistical analysis of the number of nanojunctions produced per wafer. A 10% throughput was reached for 5 nm giving a mass production of about 100 nanojunctions per 2 inches wafer all equipped with their interconnection pads.

Keywords

Type
Research Article
Information
The European Physical Journal - Applied Physics , Volume 8 , Issue 2 , September 1999 , pp. 139 - 145
Copyright
© EDP Sciences, 1999

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