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Reservation table scheduling: branch-and-bound based optimization vs. integer linear programming techniques

Published online by Cambridge University Press:  11 October 2007

Hadda Cherroun
Affiliation:
Amar Telidji University, BP. 37G, 03000 Laghouat, Algeria; [email protected]
Alain Darte
Affiliation:
LIP, ENS-Lyon (INRIA, CNRS, UCBL), 46 Allée d'Italie, 69007 Lyon, France; [email protected]
Paul Feautrier
Affiliation:
LIP, ENS-Lyon (INRIA, CNRS, UCBL), 46 Allée d'Italie, 69007 Lyon, France; [email protected]
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Abstract

The recourse to operation research solutions has strongly increasedthe performances of scheduling task in the High-Level Synthesis(called hardware compilation). Scheduling a whole program is notpossible as too many constraints and objectives interact. We decomposehigh-level scheduling in three steps. Step 1: Coarse-grain schedulingtries to exploit parallelism and locality of the whole program (inparticular in loops, possibly imperfectly nested) with a rough view ofthe target architecture. This produces a sequence of logical steps,each of which contains a pool of macro-tasks. Step 2: Micro-schedulingmaps and schedules each macro-task independently taking into accountall peculiarities of the target architecture. This produces areservation table for each macro-task. Step 3: Fine-grain schedulingrefines each logical step by scheduling all its macro-tasks. Thispaper focuses on the third step.As tasks are modeled as reservation tables, we can express resourceconstraints using dis-equations (i.e., negations of equations). Asmost scheduling problems, scheduling tasks with reservation tables tominimize the total duration is NP-complete. Our goal here is todesign different strategies and to evaluate them, on practicalexamples, to see if it is possible to find optimal solution inreasonable time. The first algorithm is based on integer linearprogramming techniques for scheduling, which we adapt to our specificproblem. Our main algorithmic contribution is an exactbranch-and-bound algorithm, where each evaluation is accelerated byvariant of Dijkstra's algorithm. A simple greedy heuristic is alsoproposed for comparisons. The evaluation and comparison are done onpieces of scientific applications from the PerfectClub and theHLSynth95 benchmarks. The results demonstrate the suitability of thesesolutions for high-level synthesis scheduling.

Type
Research Article
Copyright
© EDP Sciences, ROADEF, SMAI, 2007

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References

F. Benhamou and A. Colmerauer, Constraint Logic Programming, Selected Research. MIT Press (1993).
Berry, M., Chen, D., Koss, P., Kuck, D., Lo, S., Pang, Y., Pointer, L., Roloff, R., Sameh, A., Clementi, E., Chin, S., Scheider, D., Fox, G., Messina, P., Walker, D., Hsiung, C., Schwarzmeier, J., Lue, K., Orszag, S., Seidl, F., Johnson, O., Goodrum, R., and Martin, J., The PERFECT club benchmarks: Effective performance evaluation of supercomputers. Int. J. Supercomput. Appl. 3 (1989) 540. CrossRef
B.M. Pangrle and D.D. Gajski, Slicer: A state synthesizer for intelligent silicon compilation, in Proc. IEEE Int. Conf. Computer Design: VLSI un Computers and Processors. (1987).
R. Camposano, Behavioral synthesis, in 33rd Design Automation Conferences (1996).
T.H. Cormen, C.E. Leiserson, and R.L. Rivest, Introduction to Algorithms. The MIT Press and McGraw-Hill Book Company (1989).
A. Darte, Y. Robert, and F. Vivien, Scheduling and Automatic Parallelization. Birkhauser Boston (2000).
Dijkstra, E.W., A note on two problems in connexion with graphs. Numerische Monthly 91 (1959) 333352.
F. Donnet, Synthèse de haut niveau contrôlée par l'utilisateur. Ph.D. thesis, Université Paris VI, January 2004.
Feautrier, P., Some efficient solutions to the affine scheduling problem. part II: Multi-dimensional time. Int. J. Parallel Prog. 21 (1992) 389420. CrossRef
P. Feautrier, Scalable and modular scheduling, in Computer Systems: Architectures, Modeling and Simulation (SAMOS 2004), edited by A.D. Pimentel and Vassiliadis. Springer Verlag, Lect. Notes Comput. Sci. 3133 (2004) 433–442.
D. Frigioni, A. Marchetti-Spaccamela, and U. Nanni, Incremental algorithms for the single-source shortest path problem, in Proc. of the 14th Conference on Foundations of Software Technology and Theoretical Computer Science, London, UK, Springer-Verlag (1994) 113–124.
Gajski, D.D. and Ramachandran, L., Introduction to high-level synthesis. IEEE Des. Test Comput. 11 (1994) 4454. CrossRef
D.D. Gajski, Principle of Digital Design. Prentice Hall international edition (1997).
C.H. Gebotys and M. Elmasry, Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis, in 28th Annual ACM/IEEE Design Automation Conference (DAC'91), San Francisco, CA, USA (1991) 2–7.
S. Gupta, N. Dutt, R. Gupta, and A. Nicolau, SPARK: A high-level synthesis framework for applying parallelizing compiler transformations. in VLSID'03: Proc. of the 16th International Conference on VLSI Design (VLSI'03), IEEE Computer Society (2003).
E. Horowitz and S. Sahni, Fundamentals of Computer Algorithms. Computer Science Press (1978).
D. Kästner and M. Langenbach, Integer linear programming vs. graph-based methods in code generation. Technical Report A/01/98, Universität des Saarlandes, February 1998.
Kuchcinski, K., Constraints-driven scheduling and resource assignment. ACM Trans. Des. Autom. Electron. Syst. 8 (2003) 355383. CrossRef
T. Ly, D. Knapp, R. Miller and D. MacMillen, Scheduling using behavioral templates, in DAC'95: Proc. of the 32nd ACM/IEEE Conference on Design Automation, New York, NY, USA, ACM Press (1995) 101–106.
E. Martin, O. Stentieys, H. Dubois, and J.L. Philippe, GAUT: An architectural synthesis tool for dedicated signal processors, in EURO-DAC'93, Hambourg, Germany, Sep. 1993, 20–24.
M. Minoux, Programmation mathématique : théorie et algorithmes. Dunod, Paris (1983).
G.L. Nemhauser and L.A. Wolsey, Integer and combinatorial optimization. John Wiley & sons, New York (1988).
CPLEX Optimization, Using the CPLEX callable library (1995).
P.R. Panda and N.D. Dutt, 1995 high level synthesis design repository, in ISSS '95: Proc. of the 8th international symposium on System synthesis. New York, NY, USA, ACM Press. (1995) 170–174.
A.C. Parker, J.T. Pizarro and M. Mlinar. MAHA: a program for datapath synthesis, in DAC '86: Proc. of the 23rd ACM/IEEE conference on Design automation. Piscataway, NJ, USA, IEEE Press (1986) 461–466.
G. Ramalingam and T. Reps, An incremental algorithm for a generalization of the shortest-path problem. J. Algorithms, (1992).
Rau, B.R., Iterative modulo scheduling. Int. J. Parallel Prog. 24 (1996) 364. CrossRef
A. Schrijver, Theory of Linear and Integer Programming. John Wiley & Sons, Inc., New york (1986).
Verhaegh, W.G.J., Aarts, E.H.L., Van Gorp, P.C.N., and Lippens, P.E.R., A two-stage solution approach to multidimensional periodic scheduling. IEEE Trans. Comput.-Aided Des. 20 (2001) 11851199. CrossRef
J. Šilc, Scheduling strategies in high-level synthesis. Informatica (Slovenia) 18 (1994).
Walker, R.A. and Chaudhuri, S., Introduction to the scheduling problem. IEEE Des. Test 12 (1995) 6069. CrossRef
D.B. West, Introduction to Graph Theory. Prentice Hall (1996).
P. Yang and F. Catthoor, Pareto-optimization-based run-time task scheduling for embedded systems, in CODES+ISSS'03: Proc. of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (ISSS'03), ACM Press (2003) 120–125.
L. Zhang, SILP: Scheduling and Allocating with Integer Linear Programming. Ph.D. thesis, Technische Fakultät der Universität des Saarlandes (1996).