In this work we have investigated the average composition of Boron Interstitials Clusters (BICs) and the strain induced in the Si crystal by BICs. We have formed BICs by Si implantation and subsequent annealing of two Si samples, grown by molecular beam epitaxy, containing thin buried layers doped with different B concentrations (1019 and 1020at/cm3). By B chemical profiles diffusion analysis, we have extracted the doses of Si self-interstitials (I) and Boron atoms trapped at the BICs. The B/I stoichiometric ratio is about 1 for the low B concentration and about 3.5 for the high B concentration sample. High-resolution x-ray diffraction analyses provided an estimate of strain profile. While in the low B concentration sample no appreciable strain was detected after BIC formation, at the higher B concentration we found that the tensile strain present in the as grown B doped layer changes to a strong compressive strain as a consequence of BICs formation. For this kind of clusters, the mean volume expansion with respect to the Si matrix is of (29 ± 6) Å3 for each B atom trapped at the BICs.

The creation of ultra-shallow junction for CMOS devices at the sub-100 nm node is driving significant efforts in developing thermal processing to give rise to high dopant activation in combination with limited diffusion. Flash-assist Rapid Thermal Annealing™ (fRTP™) is a promising new annealing technique, which involves the heating of the bulk of the wafer to an intermediate temperature using rather conventional spike RTP, followed by a short and intense pulse of light localized on the implanted wafer surface.

In this work, we have systematically investigated the junction formation of different implants under fRTP anneals in terms of profile and devices. Co-implanted Ge and F species provide more box-like profiles with improved activation. Although leakage currents are higher for fRTP-annealed junctions than for spike-annealed junctions, appropriate fRTP process parameters and correct process conditions provide a critical tool to control and reduce the leakage current of co-implanted fRTP junctions to acceptable levels. Proper implant and anneal are requested for minimizing pattern effect and improving device performance.

One of the main materials challenges of the 130 nm silicon technology node was the need to find a processing solution to the anomalous diffusion behavior of ion-implanted dopants known from three decades of research. Reduction of implantation energy no longer proved sufficient when trying to reduce source/drain extension junction depth, increase abruptness, and limit sheet resistance. Spike-annealing, a new process in which ion implanted silicon could be heated rapidly to temperatures required for dopant activation and then cooled down without dwelling at temperature, adequately addressed the scaling requirements of this node. The resulting junctions achieved high dopant concentration values very close to the surface while limiting junction depth. However, this increased the propensity for dopant migration to overlying layers associated with the source/drain spacer. Loss of device performance due to this and other phenomena became a strong motivating factor for further materials research in order to sustain progress through the 130 nm and 90 nm nodes. Complex interactions between various layers have been understood and the resulting developments in spacer materials have enabled high performance devices. The requirements of the 65 and 45 nm nodes stretch spike-annealing to its limit and newer Ultra-High Temperature anneals must be considered.

As device lots become more and more expensive, process modeling is increasingly important. Process simulation and modeling is increasingly sophisticated but the accuracy remains a problem. There is generally a time lag between the introduction of a particular process and its accurate modeling – the problem of “yesterday's technology modeled tomorrow”. For many problems, absolute accuracy isn't required. Relative trends provide excellent information about the process in question. For this reason, process simulation is still a useful technique for guiding process development.

We present an atomistic model that describes the evolution of ion induced damage ranging from individual defects to continuous amorphous layers. The elementary units used to reproduce the defective zones are Si interstitials, vacancies and the IV pair, which is a local distortion of the Si lattice without any excess or deficit of atoms. More complex defect structures can be formed as these elementary units cluster. The amorphous pockets are treated as agglomerates of IV pairs, whose recrystallization rate depends on the local density of these defects. The local excess or deficit of atoms in the amorphous regions experiences some rearrangement as recrystallization takes place. In sub-amorphizing implants amorphous pockets are disconnected and when they recombine, they leave behind the local excess of Si interstitials and vacancies. When a continuous amorphous layer initially extends to the surface, the excess or deficit atoms within the amorphous layer are swept towards the surface where they are annihilated and only the defects beyond the amorphous-crystalline interface remain.

In this paper, the evolution of sheet resistance, junction depth and defects during the whole thermal cycle of a typical spike anneal with a peak temperature of 1050°C was investigated in detail. To this purpose, spike anneals were performed at peak temperatures ranging from 800°C up to 1050°C in temperature steps of 50°C. These experiments were done both on B+ (500 eV, 1.1015 cm−2) and BF2+ (2.2 keV, 1.1015 cm−2) implanted wafers. It is found that for temperatures below 850°C BF2+ implanted wafers exhibit a much better electrical activation, resulting in a lower sheet resistance, than B+ implanted ones, due to the amorphisation process occurring during the BF2+ implant and the subsequent solid phase epitaxial growth. In this low temperature regime, boron clustering takes place very rapidly in B+ implanted wafers, as confirmed by both SIMS and TEM analysis. In particular, “large” clusters, i.e. with diameter above the TEM detection limit (∼2 nm), undergo a classical Ostwald ripening process (increase in size, decrease in density). SRP measurements indicate that boron activation in this low temperature regime is not related to cluster dissolution. On the other hand, after the initial solid phase epitaxial regrowth, BF2+ implanted wafers exhibit a slight increase in sheet resistance, due to boron clustering induced by the dissolution of end of range defects. Finally, it is found that at higher spike anneal temperatures (above 850°C), both B+ and BF2+ implanted wafers exhibit a similar behaviour, with a progressive decrease in sheet resistance due to boron cluster dissolution and dopant diffusion.

A novel, non-contact method for determination of ultra-shallow junction sheet resistance and leakage current density has been developed based on monitoring the dynamics of photo-generated carriers by means of spatially separated capacitive probes. At light modulation frequencies of about 100 kHz, spatially resolved surface voltage signals give a direct measure of the junction sheet resistance, independent of the junction depth. At lower light modulation frequencies, the junction leakage current density is determined. Combining capacitive monitoring of modulated photo-generated free carriers with a precision wafer motion stage allows for rapid acquisition of sheet resistance and leakage data for efficient wafer-scale mapping applications.

In this work we investigate the diffusion of high-concentration ultrashallow boron, fluorine, phosphorus, and arsenic profiles in amorphous silicon. We demonstrate that boron diffuses at high concentrations in amorphous silicon during low-temperature thermal annealing. Isothermal and isochronal anneal sequences indicate that there is an initial transient enhancement of diffusion. We have observed this transient diffusion characteristic both in amorphous silicon preamorphized by germanium ion implantation and also in amorphous silicon preamorphized by silicon ion implantation. We also show that the boron diffusivity in the amorphous region is similar with and without fluorine, and that the lack of diffusion for low-concentration boron profiles indicates that boron diffusion in amorphous silicon is driven by high concentrations. Ultrashallow high-concentration fluorine profiles diffuse quite rapidly in amorphous silicon, and like boron, undergo a definite transient enhancement. In contrast, ultrashallow high- concentration phosphorus and arsenic profiles did not significantly diffuse in our experiments.

We present an integrated Monte Carlo implant simulator which is capable of accurately simulating ion implantation into any amorphous materials and crystalline Si for 1D/2D/3D structures with arbitrary geometry and topography. With this simulator, we investigate some practical examples which reveal interesting 2D/3D effects, and demonstrate the importance of <110> channeling for sub-100nm silicon technology.

In prior works, we demonstrated the phenomenon of fluorine-enhanced boron diffusion within self-amorphized silicon. Present studies address the process dependencies of low temperature boron motion within ion implanted materials utilizing a germanium amorphization. Silicon wafers were preamorphized with either 60 keV or 80 keV Ge+ at a dose of 1×1015 atoms/cm2. Subsequent 500 eV, 1×1015 atoms/cm211B+ implants, as well as 6 keV F+ implants with doses ranging from 1×1014 atoms/cm2 to 5×1015 atoms/cm2 were also done. Furnace anneals were conducted at 550°C for 10 minutes under an inert N2 ambient. Secondary Ion Mass Spectroscopy (SIMS) was utilized to characterize the occurrence of boron diffusion within amorphous silicon at room temperature, as well as during the Solid Phase Epitaxial Regrowth (SPER) process. Amorphous layer depths were verified through Cross-Sectional Transmission Electron Microscopy (XTEM) and Variable Angle Spectroscopic Ellipsometry (VASE). Boron motion within as-implanted samples is observed at fluorine concentrations greater than 1×1020 atoms/cm3. The magnitude of the boron motion scales with increasing fluorine dose and concentration. During the initial stages of SPER, boron was observed to diffuse irrespective of the co-implanted fluorine dose. Fluorine enhanced diffusion at room temperature does not appear to follow the same process as the enhanced diffusion observed during the regrowth process.

Previously published articles have shown that co-implanted fluorine reduces transient enhanced diffusion of boron. However, it is not yet elucidated whether this effect is due to interaction of fluorine with point-defects or boron atoms. In this work, we have used boron redistribution in a shallow Delta-doped Si structures in order to get some insights into the role of fluorine in the boron diffusion. The structures consisted of 3 boron-doped layers separated by 40nm-thick undoped silicon. The samples were given to Ge preamorphization and F co-implant. SIMS depth profiling was used to analyse boron redistribution after annealing. The results we obtained strongly suggest that fluorine is not interacting with point-defects. The reduction in boron TED is most probably due to boron-fluorine interaction.

This paper investigates the effect of varying F+ implantation energy on boron thermal diffusion and boron transient enhanced diffusion (TED) in metastable Si0.86Ge0.14 by characterising the diffusion of a boron marker layer in samples with and without P+ and F+ implants. The effect of two F+ implantation energies (185keV and 42keV) was studied at two anneal temperatures 950°C and 1025°C. In samples implanted with P+ & 185keV F+, the fluorine suppresses boron transient enhanced diffusion completely at 950°C and suppresses thermal diffusion by 25% at 1025°C. In samples implanted with P+ & 42keV F+, the fluorine does not reduce boron transient enhanced diffusion at 950°C. This result is explained by the location of the boron marker layer in the vacancy-rich region of the fluorine damage profile for the 185keV implant but in the interstitial-rich region for the 42keV implant. Isolated dislocation loops are seen in the SiGe layer for the 185keV implant. We postulate that these loops are due to the partial relaxation of the metastable Si0.86Ge0.14 layer.

Ultra-shallow p+ junctions are required for next generation electronics. We present a technique for the formation of ultra-shallow p+ junctions that increases the thermal stability of the junctions formed by ion implantation. By using a 10 nm Si1−xGex barrier layer, the diffusion of B is inhibited during high temperature processes. Alloys having a composition from x = 0 to 0.4 were investigated and it is shown that the most effective barrier had the maximum Ge fraction. The junction depth decreased to 36.7 nm for a 5×1015/cm2 1kV BF3 plasma implant spike annealed at 1050°C, compared to a junction depth of 48 nm for a Si control sample having the identical implant and anneal. It is hypothesized that the inhibition of B diffusion in the alloy layer is caused by a reduction of the Si self-interstitials in the alloy.

Effects of alloying Ni with Pt and Ta on silicide properties for CMOS technology have been studied. It was found that Pt is soluble in NiSi, which is in line with literature, whereas Ta segregates towards the surface during thermal treatment. Additionally, Ta retards NiSi formation at low temperature. Thermal stability of NiSi on Si is improved more efficiently by alloying Ni with Pt compared to Ta. Silicide/diffusion contact resistance is extracted using the Transmission Line Structure. In our experiments, contact resistivity appeared to be virtually unaffected with respect to the alloying element. Thermal stability on narrow poly Si structures was also improved when Ni was alloyed with Pt. Similar leakage currents for Ni and Ni(Pt) silicides on N+ and P+ junctions were obtained. The results presented in this work suggest that Pt is a better candidate as alloying element to improve NiSi thermal stability for CMOS processes than Ta.

A description of the transient diffusion and activation of boron during post-implantation an- nealing steps is one of the most challenging tasks. In industrially relevant situation, it needs to address diffusion at extrinsic concentrations, the agglomeration of self-interstitials, and the formation of boron-interstitial clusters. This article describes the experimental work performed or used to calibrate model parameters as independently as possible. In particular, the experiments used to extract information about the energetics of boron-interstitial clusters are described.

In this work, Raman spectroscopy was used to study the reaction of pure Ni and Ni(Pt 5 at. %) with fully-strained Si0.9Ge0.1 and Si0.899Ge0.1C0.001. With pure Ni, it was found that the incorporation of 0.1% C in the substrate resulted in out-diffusion of Ge from the germanosilicide film at a lower rapid thermal annealing (RTA) temperature compared to that of pure Ni on Si0.9Ge0.1. This Ge out-diffusion phenomenon is evident from the gradual shift in the NiSi1-wGew (w ≤ x) Raman peak from ∼213 cm−1 to higher wavenumbers, closer to 217 cm−1 as reported for pure Ni/Si, indicating that Ge is being depleted from the film with increasing RTA temperatures. In addition, it was found that severe agglomeration of the germanosilicide film occurred at a lower RTA temperature for the Ni/Si0.899Ge0.1C0.001 system. This corresponds to the observations from the Raman spectra, where a sharp increase in the Si substrate peak at 520 cm−1 was observed, coupled with the appearance of the transverse acoustic (TA)-phonon peak of Si at 301 cm−1. When Pt was introduced into the Ni film, significant improvements were observed for the germanosilicide films on Si0.9Ge0.1 and Si0.899Ge0.1C0.001 substrates, both in terms of Ge out- diffusion and agglomeration. Initial findings show that the addition of Pt promotes the formation of the low resistivity mono-germanosilicide phase at temperatures as low as 300°C.

We have developed new simulation tools to enable more precise design of sub-100nm MOSFETs. Intrinsic fluctuations in the characteristics of these devices occur as part of their statistical nature. Our three-dimensional atomistic approach to both process and device simulations enabled us to examine the coupling effects of the most significant sources of fluctuation, i.e. line-edge-roughness and random discrete dopants, considering practical fabrication processes.

This paper presents an overview of Ni-alloy (Ni, Ni-Pt and Ni-Ta) silicide development for the 45 nm node and beyond, including applications to self-aligned silicide (SALICIDE) processes, reaction with SiGe and strained Si on SiGe, and applications to fully silicided (FUSI) gates. Key SALICIDE issues addressed include the use of spike or low temperature rapid thermal processes (RTP) to control silicidation and junction leakage on small features, factors affecting the formation of epitaxial pyramidal NiSi2 grains, and NiSi thermal stability and agglomeration kinetics. Alloying with Pt or Ta is shown to improve thermal stability of NiSi films, although with quite different behaviors. While Pt is incorporated predominantly in solution in NiSi, Ta segregates to the surface of the films. Ni-Pt alloy silicides were also found to achieve low sheet resistance on narrow gates, low contact resistivity and low junction leakage, making them attractive for CMOS applications. For the Ni/SiGe reaction, a narrower RTP process window for low sheet resistance and a lower activation energy for agglomeration were observed when compared to the Ni/Si reaction. The lower thermal stability was correlated to Ge segregation from the Ni(SiGe) films. The Ni/doped poly-Si reaction was studied for FUSI gate applications, showing a retardation of the silicidation kinetics for high B doses and a large pile- up of dopants (for As, B or P) at the NiSi/SiO2 interface due to dopant snowplow during silicidation. The work function (WF) of NiSi was observed to shift with the addition of dopants, effect attributed to modifications of the interface dipole by the pile-up of dopants. No significant degradation was observed when comparing gate oxide breakdown statistics for Ni FUSI to conventional poly-Si gates. The process window for a FUSI gate-last process (performed after S/D Ni silicidation) was evaluated showing a potential integration problem due to possible degradation of the S/D silicide during the FUSI gate reaction.

Integration issues concerning recessed epitaxial SiGe(B) source/drain junctions formed by selective Si etching followed by selective epitaxial growth of in situ heavily B-doped Si1−xGex are presented. The concept is beneficial compared to conventional ion implanted junctions, since dopant activation above the solid solubility in Si can be obtained. When integrated in the PMOS process flow, the resulting Si1−xGex layer is very rough. Several possible causes for low quality epitaxy are discussed and improvements are proposed. It is suggested that the dopant type and/or concentration in the silicon substrate can have an effect on the process.

Our experiments show boron-interstitial cluster dissolution is reduced during oxidation, a behavior not predicted by the current models. Both our experiments and others on the time dependence indicate the reactivation is coming from more than one cluster. Since oxidation induced interstitial injection reduces reactivation, one of the significant clusters has to release an interstitial release during dissolution. Recent ab-initio calculations provide a qualitatively different B clustering model, with two significant cluster species. Based on these energetics, we have developed a new physically based model that for the first time accounts for the experimentally observed cluster dissolution time and ambient dependence.

Anomalous B diffusion behavior is also observed in an investigation of Ge influence on B diffusion. Silicon wafers were subjected to a Si preamorphization implant (PAI), followed by Ge and B implants contained within the existing amorphous layer. The control sample received only Si PAI and B implant. Upon annealing, the peak of the B profile shifts towards the surface and increases in magnitude, exhibiting uphill diffusion. The control samples subjected to the same thermal processing exhibit TED, but no uphill diffusion behavior. This is consistent with the model of B diffusion in Si1−xGex, accounting for trapping of B at Ge sites through formation of GeB complex.