An in-situ argon ion-mill clean step prior to ohmic metal deposition combined with a Mo barrier layer AuGe based ohmic metallization which is compatible with dry-etch process have been demonstrated to improve the uniformity of the contact parameters and reduce the contact resistance. After ion mill cleaning, the native oxide regrowth of MBE grown GaAs and AlGaAs layers in vacuum chamber was also studied to optimize the processing. These oxide layers were identified as the cause of problems in the formation of good ohmic contacts to the GaAs or AlGaAs, the Mo diffraction barrier also reduced the contact resistivity with excellent adesion, smooth morphology, and sharp edge definition.

High quality SiOx films were deposited onto InP substrates in the temperature range of 350 to 550°C and pressure range of 5 to 15 Torr. Depositions were made by means of rapid thermal low pressure chemical vapor deposition (RT-LPCVD) using oxygen (O2) and 2% diluted silane (SiH4) in argon (Ar) gas sources, with O2:SiH4 gas ratio of 5:1 to 50:1. High deposition rates of 15–50 nm/sec were obtained, providing uniform SiOx layers, with low stresses of −5×109 to −2×109 dyne-cm−2, and thermal stability on post deposition temperatures up to 1000°C. The SiOx films had refractive indexes between 1.44 and 1.50, densities of 2.25 to 2.37grcm−3 and exhibited wet etch rates of 0.2 to 0.8 nmsec.−1 through standard p-etch process. The influence of the various process parameters on the SiOx film properties was examined.

Au/Pd/Ti and Au/Ti/Pd ohmic structures to thin p+-GaAs layers have been investigated for use as contacts to the base region of HJBTs. The Au/Pd/Ti contact system yielded specific contact resistivities at or above 2.8 × 10−5Ω:cm2. Heat treatments up to 8 minutes at 380°C caused only limited interaction between the metallization and the semiconductor. The metal penetrated to a maximum depth of ≃2nm. Specific contact resistivity values less than 10−5Ωcm2 were achieved using the Au/Ti/Pd (400/75/75nm) scheme. The nonalloyed Au/Ti/Pd contact showed the best combination of electrical and structural properties with a contact resistivity value of 9 × 10≃6Ωcm2 and Pd penetration of the GaAs epilayer to a depth of cs30nm.

A phenomenological theory of Schottky contact formation to GaAs (110) surfaces at room temperature is discussed. The theory splits into two regimes, low- and high-metal coverages. In the low-coverage regime the movement of the Fermi level is proposed to occur because of universal derelaxation of the GaAs (110) surface. For large metal depositions, the resulting barrier heights are hypothesized to be determined by the interaction of either free (not involved in compound formation with other species) metal or free As with the GaAs surface region. It is shown that based on simple considerations of the relative enthalpy of metal-arsenide formation, it is possible to decide which species is responsible for the barrier height and, thus, to account for the majority of barrier heights to the GaAs (110) surface.

The formation of reliable low resistance ohmic contacts to GaAs and other III-IV compound semiconductors is essential for useful device and circuit fabrication. We have modified the standard AuGe ohmic contact process by using rapid thermal annealing at temperatures less than the AuGe eutectic temperature to form contacts based on sintering rather than alloying. Compared with alloyed contacts, sintered contacts have similar electrical performance, superior morphology, and improved reliability. Results from secondary mass spectroscopy analysis of sintered and alloyed contacts will be discussed.

The modification and control of the Schottky barrier height on (n)InGaAs is an important tool at the device preparation as the barrier height is very low, øB° = 0.2 eV. We report about the Schottky barrier enhancement on (n)InGaAs by thin fully depleted surface layers of high doped (p+)InGaAs. Structures with different thicknesses of (p+)InGaAs in the range from 8 to 80 nm were grown by LP MOVPE technique and quasi-Schottky diodes with different contact areas were prepared using titanium as a barrier metal. I-V and I-T characteristics were measured and analysed to obtain basic parameters of prepared diodes, i. e. ideality factor n, effective barrier height øB, series resistance Rgand reverse current density JR (1V). The barrier height enhancement increases with the thickness of the (p+)-layer. Effective barrier heights of øB>0.6 eV, i.e. higher than reported until now, can be obtained with the surface layers of (p+)InGaAs with thicknesses exceeding 25 nm.

The self-aligned GaAs metal-semiconductor field-effect transistor technology requires that the gate material maintains a good rectifying contact with the GaAs substrate when subjected to high-temperature annealing around 800–900° C. ZrN Schottky contacts to GaAs were previously shown to have excellent electrical properties at high tempratures. An increase of barrier height and a decrease in the reverse breakdown voltage with rapid thermal annealing at temperatures up to 900° C has been observed. The ideality factor increases after rapid thermal annealing at 900° C.

In an attempt to explain the above observations, we investigated the interface structure of such contacts under as-deposited and annealed conditions. By high resolution TEM it was found that the interface of as-deposited samples is fairly flat but protrusions form after rapid thermal annealing treatment at 850 and 900° C. The selected area diffraction analysis shows the presence of ZrO2 near the interface.

It is therefore likely that protrusions are the cause of the degradation of electrical properties of the contacts. These protrusions may be caused by the presence of a residual oxide layer before deposition. Indeed, a deposition of ZrN after sputter cleaning the substrates before deposition procedure resulted in an abrupt interface even after annealing at 900° C.

The barrier height of a Pd/n-InP diode was found to be increased from 0.48 to 0.96eV with the substrate temperature decreased from 300 to 77K during metal deposition. The leakage current density was reduced by more than six order of magnitude. It is obvious that the interface Fermi-level position lies well outside the variance associated with Fermi-level pinning. The barrier height for the Au/n-GaAs diode was found to be increased by about 0.25 eV with low temperature deposition and the leakage current reduced by more than five orders of magnitude. The mechanism responsible for the ultrahigh barrier height obtained at low substrate temperature was investigated by Raman spectroscopy, current voltage temperature measurement, deep level transient spectroscopy, and electroreflectance technique. The metal-insulator-semiconductor (MIS)-like structure formed at low substrate temperature and the reduction of interface state density may be the main reason for the dramatic enhancement of Schottky barrier height.

Low specific resistance ohmic contacts have been formed on heavily carbon doped GaAs using the Ti/Si/Pd system. Suicide formation was observed in the Pd/Si layers over the temperature range 400 – 700 C using RTA. Contact resistances as low as 0.061 Ω-mm and specific contact resistances as low as 3.2 × 10−6Ω;-cm2 were measured. Silicide/Ti/GaAs interfacial information was determined using TEM and Auger depth profiling.

A SIMS backside sputter depth-profile technique using marker layers is employed to characterize the diffusion profiles of the Ge, As, and Au in the Au-Ge contacts after annealing at 320 C for various times. This technique overcomes difficulties such as ion beam mixing and preferential sputtering and results in high depth resolution measurements since diffusion profiles are measured from low to high concentration. Localized reactions in the form of islands were observed across the surface of the contact after annealing and were composed of Au, Ge, and As, as determined by SIMS imaging and Auger depth profiling. Backside SIMS profiles indicate both Ge and Au diffusion into the GaAs substrate in the isalnd regions. Ohmic behavior was obtained after a 3 hour anneal with a the lowest average specific contact resistivity found to be ∼ 7 × 100−6 Ω- cm2.

Interfacial reactions between thin films of cobalt and germanium on (001) oriented GaAs substrates were studied in two configurations, Co/Ge/GaAs and Ge/Co/GaAs, with emphasis on Ge rich stoichiometries. It was found that at low temperatures, 250≤T<350δC, cobalt reacted with germanium to form intermetallie compounds which depended on the Co/Ge atomic ratio, while the inner interface with the GaAs substrate remained intact. At higher temperatures (up to 600δC) a limited reaction with the GaAs substrate was detected. This reaction was contained for both configurations near the interface with the substrate, and did not develop with temperature. The extent of reaction decreased with the decrease in the Co:Ge atomic ratio. Contacts produced in these systems were rectifying with a nearly ideal thermionic emission behavior.

We present the first direct measurements showing changes in the Schottky barrier height for ohmic Pd-Ge contacts to n-type GaAs. The barrier height and interface chemistry were investigated with high resolution synchrotron ultraviolet photoemission spectroscopy. Interfaces were formed by the deposition of one layer each of Pd and Ge on the GaAs substrate, where the deposition sequence was varied to allow a more quantitative determination of the role of each element. A reduction of 0.35 eV in the barrier height occurred in the case where Pd was deposited first. This reduction can be described by a model in which interface states are compensated by charge from As n-type doping of the Ge layer in the Ge-GaAs heterojunction. The dramatic change in barrier height seen when Pd is deposited first contrasts sharply with the stable barrier height observed for the case where the Ge was deposited first, a constant barrier of 0.75 eV was found after every deposition and annealing step. This stability was correlated with constant Ga and As concentrations in the Ge and a relatively low overall As concentration in the overlayer.

GaAs bipolar transistors of different emitter types have been fabricated from MOCVD grown lattice matched Ga0.5In0.5 P/GaAs layer structures using carbon for heavy base doping (p=2×1019 cm−3). Besides conventional heterojunction bipolar transistors we also investigated tunneling emitter bipolar transistors having 2 and 5 nm thin GalnP layers between emitter and base, which act as a hole repelling potential barrier in the valence band. Current gains up to 115 have been obtained at collector current densities of 104 A/cm2 even for this heavy base doping. All devices show an almost ideal output characteristics with large Early voltage and small offset voltage. From the temperature dependence of the collector current a small effective conduction band barrier at the heterointerface is determined which hardly affects electron injection into the base.

Advances in thin-film growth techniques have allowed the succesful fabrication of transistor devices, relying on heterostructure technology to enhance their electrical performance. Devices utilizing heterostructure epitaxy have demonstrated unity current-gain cut-off frequencies well in excess of 100 GHz and maximum oscillation frequencies beyond 200 GHz.

In this paper, the AlGaAs/InGaAs pseudomorphic HEMT is studied. X-ray Double-Crystal Diffractometry and Low-Temperature Photoluminescence Spectroscopy are used to demonstrate that the InGaAs pseudomorphic layer thickness of the strained layers, did not degrade the device switching speed. This suggests that HEMT devices with higher indium contents may be permitted without having to reduce the InGaAs layer thickness due to strain accommodation requirements. Since the increase in In content lowers the electron and hole effective masses and raises the low-field mobility, higher cut-off frequencies should be possible.

We grew selectively doped heterostructures on a Si substrate by metalorganic vapor phase epiaxy (MOVPE) for the first time and fabricated high electron mobility transistors (HEMTs). The conventional selective dry etching process to fabricate enhancement and depletion mode HEMTs on the same wafer, can be used without changing any process conditions. We evaluated the side-gate effect and obtained a critical voltage of 8V. This is large enough for LSI applications. We fabricated HEMTs on two kinds of GaAs-on-Si substrates. One had a small etch pit density (EPD) and poor surface morphology. The other had a large EPD, and better surface morphology. We compared the characteristics of devices on these two substrates, and the degradation of their characteristics was larger for the substrate with a small EPD and poor surface morphology. We conclude that improvement of surface morphology is more important than reduction of dis-location density. For the substrate with better surface morphology, maximum transconductance and K-value, for a gate length of 1 μm were 91% and 84% those of on-GaAs devices.

The Light-emitting diode (LED) structures have been investigated to realize high-performance LEDs on Si substrates. The light intensity of the LEDs with p-GaAs / n-GaAs / Si structures, which was effected from thickness of the p-GaAs layer, was only about 55% of the homoepitaxialLED. The light intensity of the LED with an n-GaAs/p-GaAs/Si structure, however, was about four times stronger than those of p-GaAs/n-GaAs/Si structures. After continuous operation for two hours, the intensity still kept much stronger than those of the LEDs with p-GaAs / n-GaAs / Si structures, although it decreased to 15% of the homoepitaxial LED.

The radiation hardness of small geometry (∼2 × 4 μm2), state of the art AlInAs/lnGaAs and GaAs/AlGaAs HBTs to 60Co γ-ray has been investigated up to a dose of 100 MRad. The former devices showed a small change in Ic and gain for 20 MRad, with essentially no change in IB. At 40 MRad, the gain of the devices had decreased to unity. By contrast, for GaAs/AlGaAs HBTs, the current gain actually increased up to a dose of 75 MRad. At 100 MRad, none of our devices were still operational. This was ascribed to degradation of the base-collector contact metallization (TiPtAu) and in particular to the presence of Au. Carbon-and beryllium-doped base devices showed the same response to 60Co γ-ray doses. No long transient responses in either base or collector currents were observed during irradiation of the GaAs/AlGaAs devices with 120 nsec pulses of 10 MeV electrons at rates up to 2.7 × 1010 Rad · sec−1. Results of a 2-dimensional modelling study suggest that both GaAs and InP based HBTs are relatively immune to damage by transient radiation effects up to a dose rate of 1011 Rad · sec−1, with GaAs based devices being more resistant to radiation than InP due to their shorter recombination times.

The self-electro-optic effect device (SEED) and the symmetric SEED (S-SEED) have demonstrated considerable applications for photonic switching and logic functionality. A SEED consists of a p-i-n, mesa diode, with a multiple-quantum-well structure for the i region. The symmetric SEED consists of two p-i-n mesa diodes connected in series. The S-SEED has been fabricated in functional arrays containing as many as 32×64 elements. The SEED and S-SEED are operated under a reverse bias, thus low reverse leakage is desired. As the magnitude of the reverse leakage current increases, more incident laser power is required to switch device states and then hold that state. Therefore, understanding the origins of the reverse leakage current and its dependence on mesa and array size is imperative for optimizing device performance.

The forward current-voltage (I-V) characteristics of GaAs/AlGaAs Self Electro-optic Effect Device (SEED) p-i-n diodes were measured. The I-V curves exhibited a diode like behavior with an ideality factor of 2 for voltages in the range 0.5–1.25V. In this region, the diode series resistance varied inverse proportional to the forward current with the constant of proportionality being equal to this voltage drop in the i-region. From an analysis of the experimentally obtained voltage drop, the ambipolar lifetime was determined. For the standard device whose i-region had a multi quantum well structure consisting of 60 periods of 100Å undoped GaAs wells and 65Å undoped Al0.30Ga0.70 As barriers, the ambipolar lifetime was found to be 79.6±3 psec for a 30×30 μm2 mesa device and 92 ± 4 psec for a 100×100 μm2 mesa device. When the barrier width was reduced to 35Å or when the barrier Al composition decreased to 0.2, no significant change in the ambipolar lifetime was measured. Since previous measurements have indicated that decreasing the barrier width or height greatly enhances carrier escape from the wells during the operation of the GaAs/AlGaAs p-i-n diode as a photodetector, it is inferred that the carrier escape and collection times are smaller than ∼ 80–90 psec.

The fabrication and performance characteristics of an integrated distributed feedback (DFB) laser and optical amplifier structure are described. The structure utilizes semi-insulating Fe doped InP layers for current confinement to the active region, electrical isolation between the two sections and for lateral index guiding. The amplified output has a slope of 1 mW/mA of laser current with the amplifier biased at 150 mA which is a factor of 5 larger than that for a typical laser. The laser emits near 1.55 μm and the spectral width under modulation of the amplified output is considerably smaller than that for a DFB laser for the same on/off ratio.