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Two causes of source/drain series resistance in bottom-contact pentacene thin-film transistors

Published online by Cambridge University Press:  17 March 2011

Makoto Noda ,
Nobuhide Yoneya ,
Nobukazu Hirai ,
Noriyuki Kawashima ,
Kazumasa Nomoto ,
Masaru Wada  and
Jiro Kasahara
Makoto Noda
Affiliation:
Fusion Domain Laboratory, Sony Corporation, Higashikojiya Ota-ku, Tokyo 144-0033, Japan
Nobuhide Yoneya
Affiliation:
Fusion Domain Laboratory, Sony Corporation, Higashikojiya Ota-ku, Tokyo 144-0033, Japan
Nobukazu Hirai
Affiliation:
Fusion Domain Laboratory, Sony Corporation, Higashikojiya Ota-ku, Tokyo 144-0033, Japan
Noriyuki Kawashima
Affiliation:
Fusion Domain Laboratory, Sony Corporation, Higashikojiya Ota-ku, Tokyo 144-0033, Japan
Kazumasa Nomoto
Affiliation:
Fusion Domain Laboratory, Sony Corporation, Higashikojiya Ota-ku, Tokyo 144-0033, Japan
Masaru Wada
Affiliation:
Fusion Domain Laboratory, Sony Corporation, Higashikojiya Ota-ku, Tokyo 144-0033, Japan
Jiro Kasahara
Affiliation:
Fusion Domain Laboratory, Sony Corporation, Higashikojiya Ota-ku, Tokyo 144-0033, Japan
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Abstract

We identified two causes of source/drain (S/D) series resistance (Rs) in bottom-contact (BC) pentancene thin-film transistors (TFTs). One is mixed-phase pentacene grown in the blurred- edge region of Au electrodes and the other is the semi-insulating pentacene region between the Au electrode and the carrier-accumulating layer. A novel Au S/D electrode structure with a self-assembled monolayer (SAM) adhesion layer enables direct injection of carriers into the accumulating layer and markedly reduces Rs for unit gate width (RsW) to 6 Mωμ[.proportional]m. BC TFTs with this electrode structure showed extrinsic field-effect mobility as high as 1.1 cm2/Vs.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 814: Symposium I – Flexible Electronics 2004-Materials and Device Technology , 2004 , I4.4
Copyright
Copyright © Materials Research Society 2004

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References

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