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Theory of Vertical Amorphous Silicon Thin-Film Transistors

Published online by Cambridge University Press:  25 February 2011

J. G. Shaw  and
M. Hack
J. G. Shaw
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304
M. Hack
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304
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Abstract

We describe a vertical amorphous silicon thin-film transistor which is easy to fabricate and has a very short channel length that is determined by deposition, not lithography. Our vertical TFTs are compatible with large-area processing techniques andd have suitable terminal characteristics for use in practical circuits. Unlike a conventional thin-film transistor, the current path is primarily parallel to the electric field created by an insulated gate electrode. A two-dimensional computer program is used to analyze these devices and guide their design and optimization. We show how to suppress excessive leakage currents and improve the saturation of the output characteristics by a novel current-blocking technique.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 149: Symposium E – Amorphous Silicon Technology - 1989 , 1989 , 259
Copyright
Copyright © Materials Research Society 1989

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References

REFERENCES

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