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Surface Passivation of GaAs Power FETs

Published online by Cambridge University Press:  10 February 2011

Tsuyoshi Tanaka
Affiliation:
Electronics Research Laboratory, Matsushita Electronics Corporation Yagumonakamachi 3–1–1, Moriguchi, Osaka 570–8501, Japan
Hidetoshi Furukawa
Affiliation:
Electronics Research Laboratory, Matsushita Electronics Corporation Yagumonakamachi 3–1–1, Moriguchi, Osaka 570–8501, Japan
Kazuo Miyatsuji
Affiliation:
Electronics Research Laboratory, Matsushita Electronics Corporation Yagumonakamachi 3–1–1, Moriguchi, Osaka 570–8501, Japan
Daisuke Ueda
Affiliation:
Electronics Research Laboratory, Matsushita Electronics Corporation Yagumonakamachi 3–1–1, Moriguchi, Osaka 570–8501, Japan
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Abstract

The surface passivation of GaAs power FET has been investigated. Intermodulation distortion of GaAs power FET was found to be affected by frequency dispersion which originates from electron trap at the surface in the vicinity of the gate. There are two ways to suppress the frequency dispersion. One is reducing electron trap itself by using surface passivation, the other is making surface insensitive to the surface trapping effect. We found the FET with undoped InGaP layers on the n-GaAs channel is free from surface trapping effects. The undoped InGaP layer acts as an ideal passivation layer for the channel, since it shows only 2% frequency dispersion of drain current at 1MHz compared to DC condition.

Type
Research Article
Copyright
Copyright © Materials Research Society 1999

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References

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