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A Study on the Self-Stopping CMP Process for the Planarization of the High Step Height(@step height>1.5um) Pattern
Published online by Cambridge University Press: 15 March 2011
Abstract
CMP(Chemical Mechanical Planarization) process is widely used to reduce step height in semiconductor fabrication processes. As a design rule shrinks, a highly planar surface becomes inevitable within wafer scales. In order to get a high degree of a planarization, self-stopping characteristics of a ceria-based slurry should be studied and used in semiconductor process. In this study, threshold polishing pressure for a self-stopping characteristics was obtained by optimizing down pressure, pad conditioning, and mixing ratio of ceria abrasive and additive. A series of experiments were made to optimize the threshold polishing pressure in variable line & space patterns that consist of 0.8um step height and unit oxide film. As a result, self-stopping cmp process is twice batter than conventional silica-based process with respect to planarity and WIWNU. In addition, WIWNU and step height was dramatically decreased to less than 1000Å when applying to real fabrication devices over 2um step height.
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- Copyright © Materials Research Society 2004