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Published online by Cambridge University Press: 15 March 2011
Strained-Si MOSFET is an attractive device structure to be able to relax several fundamental limitations of CMOS scaling, because of high electron and hole mobility and compatibility with Si CMOS standard processing. In this paper, we present a new device structure including strained-Si channel, strained-SOI MOSFET, applicable to CMOS under sub-100 nm technology nodes. The main feature of this device is that thin strained-Si channel/relaxed SiGe hetero-structures are formed on buried oxides. The principle and the advantages are described in detail. The strained-SOI MOSFETs, whose electron and hole mobility is 1.6 and 1.3 times, respectively, higher than in conventional MOSFETs, have successfully been fabricated by combining the SIMOX technology with re-growth of strained Si films. We also present novel fabrication techniques to realize ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with high Ge content, including Ge condensation due to oxidation of SGOI with lower Ge content. Strained-Si/SGOI structures with total thickness of 21 nm and Ge content of 56 % have been fabricated by oxidizing SiGe films on conventional SOI substrates and re-growing strained-Si films.