An integral part of very large scale integrated (VLSI) circuits is the multilayer structures for electrical interconnection and insulation. Many conducting materials are used for interconnection including polysilicon, silicon, silicides, polycides and metals. An important point in considering these materials is the interconnection between them and the corresponding characterization of the interface by way of the specific contact resistance, which directly affects the interfacial contact resistance.

For a planar ohmic contact formed between a metal and any layer with a much larger sheet resistance (for example single crystal silicon) a technique based on the transmission line model provides a method of characterizing these contacts. However, for planar contacts between layers with comparable sheet resistivities for example polysilicon to single crystal silicon this technique must be modified. In this paper we review the transmission line approach used to obtain the specific contact resistance between such layers and provide initial results of measurements made on the poly to single crystal interface. We also present a series of test structures, currently under fabrication that will provide more detailed experimental data.