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Shallow P+-N Junction Fabrication by Plasma Immersion Ion Implantation

Published online by Cambridge University Press:  16 February 2011

C. A. Pico
Affiliation:
University of California at Berkeley, Department of Electrical Engineering and Computer Sciences, Berkeley, CA 94720
X. Y. Qian
Affiliation:
University of California at Berkeley, Department of Electrical Engineering and Computer Sciences, Berkeley, CA 94720
E. Jones
Affiliation:
University of California at Berkeley, Department of Electrical Engineering and Computer Sciences, Berkeley, CA 94720
M. A. Lieberman
Affiliation:
University of California at Berkeley, Department of Electrical Engineering and Computer Sciences, Berkeley, CA 94720
N. W. Cheung
Affiliation:
University of California at Berkeley, Department of Electrical Engineering and Computer Sciences, Berkeley, CA 94720
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Abstract

Plasma immersion ion implantation (PIII) has been applied to fabricate shallow p-n junction diodes and MOS test structures. BF3 ions created by an electron cyclotron resonance source were implanted into n-type Si(100) at an accelerating voltage of −2 kv. The implant doses ranged from 4 × 1014/cm2 to 4 × 1015/cm2. In some cases, the top layers of the Si(100) substrates were preamorphized by a 3 × 1015/cm2 to 1016/cm2 implant of SiF4 by PIII at −7.2 kV prior to the BF3 implant. The ideality factor exhibited in both non- and preamorphized samples during forward bias is 1.02 to 1.05. Reverse leakages were measured at 30 nA/cm2 at −5V. High frequency capacitance and high field breakdown measurements of the oxide test structures showed no significant damage to the oxide.

Type
Research Article
Copyright
Copyright © Materials Research Society 1991

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References

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