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Shall Diensions or Low Dielectric Constant the Competing Approaches to High Density Interconnect

Published online by Cambridge University Press:  21 February 2011

W. John Balde*
Affiliation:
Senior Consultant Interconnection Decision Consulting Flemington, New Jersey 08822
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Extended abstract

Ten years ago, the conventional wisdom as cited by Rex Rice and others was that interconnect wiring on a silicon chip was much less expensive than interconnections on a ceramic hybrid, a printed circuit board, or cable interconnect. That led to a major emphasis on increasing the size and complexity of the silicon chip, with the other interconnect media left for the overflow or leftovers that could not be placed on the chip.

A major change of thinking was triggered by Knausenberger and Schaper of AT&T (1), with the realization that costs normalized per inch of wire length were nearly identical for all forms of interconnect. Literally an inch of interconnection circuit costs the same whether that circuit was on silicon or on ceramic, whether that circuit was on a printed circuit board or in cable.

If the only important criteria is the length of the interconnect, then a system or a board of the smallest size and area for a given circuit will have the shortest path lengths and the lowest cost. The dominant criteria is the area of the interconnection medium that carries the active silicon.

Type
Research Article
Copyright
Copyright © Materials Research Society 1988

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References

LIST OF REFERENCES

1. Electrical Design of a High Speed Computer Packaging System, Daviscon, E.E., IBM, IEEE CHMT Transactions, Volume 6, Number 3, page 280Google Scholar
2. Design Improvements in PWB Electrical Performance via Thermoset Resin Technology, Lyssy, M. E., Kubisiak, M. P., and Aldritch, P. D., Dow Chemical, Proceedings of the Sixth Internationalk Electronics Packaging Conference, page 109Google Scholar
3. Electrical and Mechanical Characteristics of Low Dielectric Constant Printed Wiring Boards, D. J. Arthur, Rogers, IPC Spring Conference, 1986Google Scholar
4. High Performance Low Dielectric Constant Substrate, Johnson, D., Gore and Hirosuzui and Telsuro Umebayshi, Junkosho, IEEE Computer Packaging Workshop, Oiso Japan, January 1986Google Scholar
5. PBT Liquid Crystal plastic for self-reinforcing printed Wiring Board Use, Lusignea, R., Foster-Miller, IEEE Computer Packaging meeting, December 1986, New YorkGoogle Scholar