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Self-Passivated Copper Gates For Thin Film Silicon Transistors

Published online by Cambridge University Press:  10 February 2011

H. Sirringhaus ,
S.D. Theiss ,
A. Kahn  and
S. Wagner
H. Sirringhaus
Affiliation:
Department of Electrical Engineering, Princeton University, Princeton, NJ 08544
S.D. Theiss
Affiliation:
Department of Electrical Engineering, Princeton University, Princeton, NJ 08544
A. Kahn
Affiliation:
Department of Electrical Engineering, Princeton University, Princeton, NJ 08544
S. Wagner
Affiliation:
Department of Electrical Engineering, Princeton University, Princeton, NJ 08544
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Abstract

A solution to the thin film silicon transistor gate metallization problem in active matrix liquid crystal displays is demonstrated in the form of a self-passivation process for copper. Bottom-level copper (Cu) lines are passivated by a self-aligned CrOx encapsulation formed by surface segregation of chromium (Cr) from dilute Cu1-xCrx alloys (x=0.1–2.3) at 400°C. The encapsulation is an efficient barrier for Cu diffusion into the SiNx gate insulator during the plasma deposition and transistor processing, and solves the problems of oxidation and adhesion to the glass substrate. Gate line resistivities are 4.5 to 7.5μΩcm depending on the initial Cr concentration. The performance of self-passivated Cu-gate thin film transistors is comparable to that of transistors with refractory metal gates.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 446: Amorphous and Crystalline Insulating Thin Films–1996 , 1996 , 59
Copyright
Copyright © Materials Research Society 1997

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