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Schottky Source/Drain Transistor on Thin SiGe on Insulator Integrated with HfO2/TaN Gate Stack

Published online by Cambridge University Press:  01 February 2011

Fei Gao ,
S.J. Lee ,
Rui Li ,
S. Balakumar ,
Chih-Hang Tung ,
Dong-Zhi Chi  and
Dim-Lee Kwong
Fei Gao
Affiliation:
[email protected], Silicon Nano Device Lab, National university of singapore, Department of ECE, National University of Singapore, Block E4A #02-04 Engineering Drive 3, Singapore 117576, Singapore, N/A, 117576, Singapore
S.J. Lee
Affiliation:
[email protected], Silicon nano device Lab, Department of ECE, National University of Singapore, Block E4A #02-04 Engineering Drive 3, singapore, N/A, 117576, Singapore
Rui Li
Affiliation:
[email protected], Silicon nano device Lab, Department of ECE, National University of Singapore, Block E4A #02-04 Engineering Drive 3, singapore, N/A, 117576, Singapore
S. Balakumar
Affiliation:
[email protected], Institute of Microelectronics Engineering, Singapore, singapore, N/A, 117685, Singapore
Chih-Hang Tung
Affiliation:
[email protected], Institute of Microelectronics Engineering, Singapore, singapore, N/A, 117685, Singapore
Dong-Zhi Chi
Affiliation:
[email protected], Institute of Materials Research Engineering, Singapore, N/A, 117602, Singapore
Dim-Lee Kwong
Affiliation:
[email protected], Institute of Microelectronics Engineering, Singapore, singapore, N/A, 117685, Singapore
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Abstract

We report thin SGOI (Silicon Germanium on Insulator) with 65% Ge concentration p- MOSFET (Metal-Oxide-Semiconductor-Field-Effect-Transistor) using Ni-germanosilicide Schottky S/D (source/drain) and HfO2/TaN gate stack integrated with conventional self-aligned top gate process. Unlike high temperature S/D activation needed for conventional transistor, low Ni-germanosilicide S/D formation temperature contributes to the excellent capacitance-voltage characteristic, low gate leakage current and hence, well-behaved transistor performance. In addition, SOI structure suppresses the junction leakage problem, resulting in good agreement between the source current and drain current of the MOSFET.

Keywords

microelectronicsGeSi
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 913: Symposium D – Transistor Scaling – Methods, Materials and Modeling , 2006 , 0913-D01-04
Copyright
Copyright © Materials Research Society 2006

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References

1 Choi, Y.-K, Jeon, Y.-C, Ranade, P., Takenuchi, H., King, T.-J, Bokor, J., Hu, C.M., 58th Device Research Conference 2000, 23, (2000).Google Scholar
2 Lee, M.L. and Fitzgerald, E.A., J. Appl. Phys. Lett., 97, 101 (2005).Google Scholar
3 Fukatsu, S., Ishikawa, Y., Saito, T., and Shibata, N., Appl. Phys. Lett. 72, 3485 (1998).Google Scholar
4 Taraschi, G., Pitera, A.J., and Fitzgerald, E.A., Solid-State Electron. 48, 1297 (2004).Google Scholar
5 International Technology Roadmap for Semiconductors, 2004 update, Process Integration, Devices, and Structures, (2004).Google Scholar
6 Tezuka, T., Sugiyama, N., and Takagi, S., Appl. Phys. Lett. 79, 1789 (2001).Google Scholar
7 Gao, F., Balakumar, S., Balasubramanian, N., Lee, S.J., Tung, C.H., Kumar, R., Sudhiranjan, T., Foo, Y.L., and Kwong, D.-L., Electronchem. and Solid-State Lett., 8 (12) G337–G340 (2005).Google Scholar
8 Zhu, S., Li, R., Lee, S.J.. Li, M.F.. Du, A.. Singh, J., Zhu, C., Chin, A., Kwong, D. L., IEEE Electron. Dev. Lett., 26, 81 (2005).Google Scholar
9 Zhu, S., Yu, H.Y., Whang, S.J., Chen, J.H., Zhu, C., Lee, S.J., Li, M.F.. Chan, D.S.H., Yoo, W.J.. Du, A., Tung, C.H., Singh, J., Chin, A., Kwong, D.L., IEEE Electron. Dev. Lett., 25, 268 (2004).Google Scholar
10 Zhu, S., Chen, J., Li, M.-F., Lee, S.J., Singh, J., Zhu, C.X., Du, A., Tung, C.H., Chin, A., Kwong, D.L., IEEE Electron. Dev. Lett., 25, 565 (2004).Google Scholar
11 Maeda, T., Ikeda, K., Nakaharai, S., Tezuka, T., Sugiyama, N., Moriyama, Y., and Takagi, S., IEEE Electron. Dev. Lett., 26, 102 (2005).Google Scholar
12 Lee, M. L. and Fitzgerald, E. A., J. Appl. Phys., 97, 1 (2005).Google Scholar
13 Chui, C.O., Ramanathan, S., Triplett, B.B., Mclntyre, P.C., Saraswat, K.C., IEEE Electron. Dev. Lett., 23, 473 (2002).Google Scholar
14 Wu, Nan, Zhang, Qingchun, Zhu, Chunxiang, Chan, DSH, Li, M.F., Balasubramanian, N., Chin, Albert, and Kwong, Dim-Lee, Appl. Phys. Lett., 85, 4127 (2004).Google Scholar
15 Zhang, S.L., Ostling, M., Critical Reviews in Solid State and Mater. Sci., 28, 1, (2003).Google Scholar
16 Whang, S.J., Lee, S.J., Gao, F., Wu, N., Zhu, C.X., Pan, J.S., Tan, L.J., Kwong, D.L., Tech. Dig. –Int. Electron Devices Meet. 2004, 307 (2004).Google Scholar
17 Afanas'ev, V.V, Stesmans, A., Appl. Phys. Lett. 84. 2319 (2004).Google Scholar
18 Kim, H., Mclntyre, P.C., Chui, C.O., Saraswat, K.C., Cho, M.H., Appl. Phys. Lett., 85, 2902 (2004).Google Scholar
19 Elshocht, S.V., Brijs, B., Caymax, M., Conard, T., Chiarella, T., Gendt, S.D., Jaeger, B.D., Kubicek, S., Meuris, M., Onsia, B., Richard, O., Teerlinck, I., Steenbergen, J.V., Zhao, C., Heyns, M., Appl. Phys. Lett., 85, 3824 (2004).Google Scholar
20 Maiti, C. K., Chakrabarti, N. B. and Ray, S. K., Strained Silicon and Heterostructures: materials and devices, (The insititute of Electrical Engineers, 2001).Google Scholar
21 Suh, Y.S., Carroll, M.S., Levy, R.A., Sahiner, M.A., Bisognin, G., King, C.A., IEEE Trans. Electron Devices, 52, 91 (2005).Google Scholar
22 Nayfeh, A., Chui, C.O., Yonehara, T., Saraswat, K.C., IEEE Electron. Dev. Lett., 26, 311 (2005).Google Scholar
23 Chi, D.Z, Lee, R.T. P., Chua, S.J., Lee, S.J., Ashok, S. and Kwong, D.-L., Appl. Phys. Lett. 97 113706 (2005).Google Scholar