We report our fabrication of pentacene field effect transistors (FETs) based on a vacuum processed and e-beam cured polymer electrolyte (i.e., tripropylene glycol diacrylate (TRPGDA)) as a gate dielectric layer on flexible wide web substrates. The deposition of the semiconductor and gate insulator layers is carried out in Oxford's roll-to-roll vacuum web processing facility and could be combined in-line with roll-to-roll pattern metallization. The aim of the work is to demonstrate the ability to create all-evaporated transistors, exploiting the kind of technologies at present extensively used in the food packaging industry, for example, in which all layers can be deposited at high web speeds. Ours is a room temperature and a solvent-free method with an ultrahigh deposition rate (web speeds in excess of 100 m/min are possible).

The performance of the pentacene and the polymer dielectric materials within devices was investigated, demonstrating (1) the ability to deposit good quality pentacene layers in the roll-to-roll environment and (2) the importance of the e-beam curing conditions of the dielectric layer on the performance of the organic FET devices. This deposition route creates a smooth, pin-hole-free dielectric layer as it is deposited onto the substrate as a monomeric liquid, before curing, and there is no mass-loss such as in solvent-based deposition processes. These devices have a 250 μm channel length and an aspect ratio of 16. No self-assembled monolayer (SAM) or other surface modification had been applied to the insulator layer to achieve these properties.

The tuning of the transistors' operating voltage and output characteristics was feasible through the ease of control of the polymer dielectric thickness achieving a threshold voltage of less than 10 V. On/off ratio in excess of 103, and mobility = 0.1 cm2V-1s-1 have been achieved.

The ability to integrate such a high deposition rate polymer process, into a single step, multilayer, vacuum deposition process with conventional vacuum deposition sources provides a possible route to low cost and large area electronic device processing.