Hostname: page-component-78c5997874-j824f Total loading time: 0 Render date: 2024-11-06T12:18:06.477Z Has data issue: false hasContentIssue false
  • English
  • Français

Reliability Study of Plasma Etching Damage in ULSI Process

Published online by Cambridge University Press:  22 February 2011

Xiao-Yu Li ,
Jen-Tai Hsu ,
Paul Aum ,
Vivek Bissessur ,
David Chan  and
C.R. Viswanathan
Xiao-Yu Li
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA 90024
Jen-Tai Hsu
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA 90024
Paul Aum
Affiliation:
SEMATECH, Austin, TX 78741-6499
Vivek Bissessur
Affiliation:
SEMATECH, Austin, TX 78741-6499
David Chan
Affiliation:
SEMATECH, Austin, TX 78741-6499
C.R. Viswanathan
Affiliation:
Department of Electrical Engineering, University of California, Los Angeles, CA 90024
Get access

Abstract

Plasma etching can cause damage in gate oxide during ULSI processing. The damage in the oxide is believed to arise through a high field induced stress current. However, there is another type of damage which is due to ion and photon bombardment on the edge of poly-Si gate during the plasma etching. These two damage mechanisms impose different reliability problems. One is hot-carrier(HC) stress and the other is Fowler-Nordheim(F-N) stress. MOS devices with special test structures to assess plasma process damage were fabricated using 0.35 μm CMOS technology. The devices with different poly gate antennas and etching through different poly-Si gate etching conditions were studied using SEM and various electrical techniques. It was found that oxide charging damaged device is more susceptible to F-N type of stress while ion and photon bombardment damaged device is more susceptible to HC type of stress.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 338: Symposium – Materials Reliability in Microelectronics IV , 1994 , 51
Copyright
Copyright © Materials Research Society 1994

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

[1] Oehrlein, G.S., Rembetski, J.F., IBM J. Res. Develop, vol. 36 No. 2. p. 141, (1992).Google Scholar
[2] Shone, F., K, Wu, Shaw, J., Hokelek, E., Mittal, S., and Haranalialli, A., VLSI Symposium Tech. Dig., p. 73, (1989). of tile 19th Conference on Solid State Devices and Material, p. 195, (1987).Google Scholar
[3] Rydén, K.H., Norstrim, H., Nender, C. and Berg, S., J. Electro. Chem. Society, vol. 134, p.3113, (1987).Google Scholar
[4] Namura, T., Uchida, H., Okada, H., Kosshio, A., Nakagawa, S., Todokoro, Y. and Inoue, M., Proc. SPIE. Dry Etch Technology, p. 11, (1991).Google Scholar
[5] Shiin, H., Jha, N., Qian, X.Y., Hills, G.W., and Hu, C., Solid State Technology, p. 29, August, (1993).Google Scholar
[6] Li, X.Y., Hsu, J.T., Auri, P., Bissessur, V., Chan, D. and Viswanathan, C.R., IEE Electronics Letters, vol.30, No.4, (1994)Google Scholar
[7] Li, Xiaoyu, Divakaruni, R., Hsu, Jen-Tai, Prabhiakar, V., Aum, Paul, Chan, David, and Viswanathan, C.R., IEEE Electron Device Letters, vol.15, No.4, (1994).Google Scholar
[8] Heremans, P., Witters, J., Groeseneken, G., and Maes, H., IEEE Trans. Electron Devices, vol.36, p.1318, (1989).Google Scholar
[9] Chang, J., PhD dissertation, UCLA, 1994 Google Scholar
[10] Gu, T., Okandani, M., Awaadelkarim, O.O., Fonash, S.J., Rembetski, J.F., Aum, P. and Chan, D., IEEE Electron Device Letters, vol.15, No.2, (1994).Google Scholar
[11] Li, Xiaoyu, Hsu, Jen-Tai, Aura, Paul, Chan, David, Rembetski, J. and Viswanathan, C.R., IEEE Electron Device Letters, vol. 14, No.2, (1993).Google Scholar