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Rapid Thermal Annealing of Tisi2 for Interconnects

Published online by Cambridge University Press:  25 February 2011

P.J. Rosser  and
G.J. Tomkins
P.J. Rosser
Affiliation:
Standard Telecommunication Laboratories Limited, London Road, Harlow, Essex, UK
G.J. Tomkins
Affiliation:
Standard Telephones and Cables, Maidstone Road, Foots Cray, Kent, UK.
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Abstract

A self-aligned polycide gate interconnect process has been developed at STL in order to reduce the RC delays in existing and planned MOS circuits. This process has been chosen due to its ease of implementation into an existing process line. Incoherent lamp annealing is used to form the silicide after the deposition of titanium over patterned polysilicon.

This paper will discuss the various materials and processes considered, outlining the significant attributes of each. The factors which must be controlled to achieve a practical process are discussed, together with the degree of redistribution of dopants and the role of other impurities.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 35: Symposium A – Energy Beam-Solid Interactions and Transient Thermal Processing/1984 , 1984 , 457
Copyright
Copyright © Materials Research Society 1985

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References

REFERENCES

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6) Ibid.Google Scholar
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