Low dielectric constant materials (k < 3.0) have the advantage that higher performance IC devices may be manufactured with minimal increases in chip size. The reduced capacitance given by these materials permits shrinking spacing between metal lines to below 0.25 μm and the ability to decrease the number of levels of metal in a device. The technologies being considered for low k applications are CVD or spin-on of inorganic or organic polymeric materials. Traditional spin-on silicates or siloxanes have been used as planarizing dielectrics during the last 15 years and usually have k > 3.0.