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Process Development of Silicon-Silicon Carbide Hybrid Micro-Engine Structures

Published online by Cambridge University Press:  15 March 2011

Dongwon Choi
Affiliation:
Dept. of Materials Science and Engineering, Massachusetts Institute of Technology
Robert J. Shinavski
Affiliation:
Hyper-Therm High-Temperature Composites, Inc., Huntington Beach, CA 92648
Wayne S. Steffier
Affiliation:
Hyper-Therm High-Temperature Composites, Inc., Huntington Beach, CA 92648
Skip Hoyt
Affiliation:
MIT Lincoln Laboratory, Lexington, MA 02420
S.Mark Spearing
Affiliation:
Dept. of Aeronautics and Astronautics, Massachusetts Institute of Technology, Cambridge, MA 02139
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Abstract

A MEMS-based gas turbine engine is being developed for use as a button-sized portable power generator or micro-aircraft propulsion source. Power densities expected for the micro- engine require high combustor exit temperatures (1300-1700K) and very high rotor peripheral speeds (300-600m/s). These harsh operating conditions induce high stress levels in the engine structure, and thus require refractory materials with high strength. Silicon carbide has been chosen as the most promising material for use in the near future due to its high strength and chemical inertness at elevated temperatures. However, techniques for microfabricating single- crystal silicon carbide to the level of high precision needed for the micro-engine are not currently available. To circumvent this limitation and to take advantage of the well-established precise silicon microfabrication technologies, silicon-silicon carbide (SiC) hybrid turbine structures are being developed using chemical vapor deposition of poly-SiC on silicon wafers and wafer bonding processes. Residual stress control of SiC coatings is of critical importance to all the silicon-silicon carbide hybrid structure fabrication steps since a high level of residual stresses causes wafer cracking during the planarization, as well as excessive wafer bow, which is detrimental to the subsequent planarization and bonding processes. The origins of the residual stresses in CVD SiC layers have been studied. SiC layers (as thick as 30µm) with low residual stresses (on the order of several tens of MPa) have been produced by controlling CVD process parameters such as temperature and gas ratio. Wafer-level SiC planarization has been accomplished by mechanical polishing using diamond grit and bonding processes are currently under development using interlayer materials such as silicon dioxide or poly-silicon. These process development efforts will be reviewed in the context of the overall micro-engine development program.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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