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Preparation of Large Thin Area Vlsi Tem Specimens by Dimpling With A “Flatting Tool”

Published online by Cambridge University Press:  21 February 2011

Helen L. Humiston ,
Bryan M. Tracy ,
M. Lawrence  and
A. Dass
Helen L. Humiston
Affiliation:
Intel Corporation, 3065 Bowers Avenue, Santa Clara, CA 95052-8126.
Bryan M. Tracy
Affiliation:
Intel Corporation, 3065 Bowers Avenue, Santa Clara, CA 95052-8126.
M. Lawrence
Affiliation:
Intel Corporation, 3065 Bowers Avenue, Santa Clara, CA 95052-8126.
A. Dass
Affiliation:
Intel Corporation, 3065 Bowers Avenue, Santa Clara, CA 95052-8126.
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Abstract

An alternative VLSI TEM specimen preparation technique has been developed to produce 100μm diameter electron transparent thin area by using a conventional dimpler with a texmet padded ‘flatting tool’ for dimpling and a microcloth padded ‘flatting tool’ for polishing, followed by low angle ion milling. The advantages of this technique are a large sampling area and shorter milling times than conventional specimen preparation methods. In the following, we report the details of the modified dimpling technique. The improvements in available electron transparency, and a decrease in ion milling time are demonstrated with the preparation of planar and cross section VLSI device samples.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 254: Symposium W – Specimen Preparation for Transmission Electron Microscopy of Materials III , 1991 , 211
Copyright
Copyright © Materials Research Society 1992

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