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Nanowire Tunnel FETs - Device Structure, Transistor Dimension and Material Choice

Published online by Cambridge University Press:  03 March 2011

J. Knoch
J. Knoch*
Affiliation:
TU Dortmund University, 44227 Dortmund, Germany
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Abstract

The performance of tunnel FETs is investigated and the impact of device structure and dimension as well as the impact of the transistor material will be studied. For instance, using nanowires with thin diameter providing one-dimensional transport together with a wrap-gate device structure strongly improves the tunnel FET performance. In addition, the use of III-V type II heterostructures is a further performance booster. However, the use of III-V semiconductors with low density of states can be problematic if the device is not designed properly. Here we will give design guidelines and performance predictions of nanowire tunnel FETs based on non-equilibrium Greens functions formalism simulations.

Keywords

nanostructureIII-Vnanoscale
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1302: Symposium W – Nanowires—Growth and Device Assembly for Novel Applications , 2012 , mrsf10-1302-w05-06
Copyright
Copyright © Materials Research Society 2011

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References

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