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Modeling Soft Breakdown of Ultra-Thin Gate Oxide Layers

Published online by Cambridge University Press:  10 February 2011

Michel Houssa ,
P.W. Mertens  and
M.M. Heyns
Michel Houssa
Affiliation:
IMEC, Silicon Process Technology Division, Kapeldreef 75, B-3001 Leuven, BELGIUM
P.W. Mertens
Affiliation:
IMEC, Silicon Process Technology Division, Kapeldreef 75, B-3001 Leuven, BELGIUM
M.M. Heyns
Affiliation:
IMEC, Silicon Process Technology Division, Kapeldreef 75, B-3001 Leuven, BELGIUM
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Abstract

The time-dependent dielectric breakdown of MOS capacitors with ultra-thin gate oxide layers is investigated. After the occurrence of soft breakdown, the gate current increases by 3 to 4 orders of magnitudes and behaves like a power law of the applied gate voltage. It is shown that this behavior can be explained by assuming that a percolation path is formed between the electron traps generated in the gate oxide layer during electrical stress of the capacitors. The time dependence of the gate voltage signal after soft breakdown is next analysed. It is shown that the fluctuations in the gate voltage are non-gaussian as well as that long-range correlations exist in the system after soft breakdown. These results can be explained by a dynamic percolation model, taking into account the trapping-detrapping of charges within the percolation cluster formed at soft breakdown.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 567: Symposium R – Ultrathin SiO2 and Higg-K Materials for ULSI Gate Dielectrics , 1999 , 307
Copyright
Copyright © Materials Research Society 1999

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References

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