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Laser Direct Write Technologies as Tools for Gate-Array Development**

Published online by Cambridge University Press:  21 February 2011

D. J. Silversmith ,
D. J. Ehrlich ,
J. Y. Tsao ,
R. W. Mountain  and
J. H. C. Sedlacek
D. J. Silversmith
Affiliation:
Lincoln Laboratory, Massachusetts Institute of TechnologyLexington, Massachusetts 02173–0073
D. J. Ehrlich
Affiliation:
Lincoln Laboratory, Massachusetts Institute of TechnologyLexington, Massachusetts 02173–0073
J. Y. Tsao
Affiliation:
Lincoln Laboratory, Massachusetts Institute of TechnologyLexington, Massachusetts 02173–0073
R. W. Mountain
Affiliation:
Lincoln Laboratory, Massachusetts Institute of TechnologyLexington, Massachusetts 02173–0073
J. H. C. Sedlacek
Affiliation:
Lincoln Laboratory, Massachusetts Institute of TechnologyLexington, Massachusetts 02173–0073
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Abstract

Using CMOS, poly-Si gate, single-level metal, gate-array chips, techniques have been developed to reconfigure the interconnect metallization on individual circuits without degradation of device or circuit performance. These techniques involve a laser-assisted capillary wet-etch process for highly selective removal of Al-alloy interconnects and laser CVD of doped poly-Si links. This technique may be useful for prototyping, testing and optimization of gate-array and standard-cell designs and layouts.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 29: Symposium I – Laser-Controlled Chemical Processing of Surfaces , 1983 , 55
Copyright
Copyright © Materials Research Society 1984

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Footnotes

*

This work was sponsored by the Defense Advanced Research Projects Agency, by the Department of the Air Force, in part under a specific program supported by the Air Force Office of Scientific Research, and by the Army Research Office.

References

REFERENCES

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