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Improvement of InGaP/GaAs Heterointerface Quality by Controlling AsH3 Flow Conditions

Published online by Cambridge University Press:  03 September 2012

Yoshino K. Fukai
Affiliation:
NTT System Electronics Laboratories, 3-1 Morinosato Wakamiya Atsugi-shi, Kanagawa, 243-01 JAPAN, [email protected].
Fumiaki Hyuga
Affiliation:
NTT System Electronics Laboratories, 3-1 Morinosato Wakamiya Atsugi-shi, Kanagawa, 243-01 JAPAN, [email protected].
Takumi Nittono
Affiliation:
NTT System Electronics Laboratories, 3-1 Morinosato Wakamiya Atsugi-shi, Kanagawa, 243-01 JAPAN, [email protected].
Kazuo Watanabe
Affiliation:
NTT System Electronics Laboratories, 3-1 Morinosato Wakamiya Atsugi-shi, Kanagawa, 243-01 JAPAN, [email protected].
Hirohiko Sugahara
Affiliation:
NTT System Electronics Laboratories, 3-1 Morinosato Wakamiya Atsugi-shi, Kanagawa, 243-01 JAPAN, [email protected].
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Abstract

This paper examines the conduction band offset, ∆Ec, and interface charge density, σ, of disordered InGaP and GaAs heterointerfaces by controlling the AsH 3 cover time and flow rate at the growth interval from GaAs to InGaP. Short AsH, cover time (0.05 min) creates high ΔEc of 0.2 eV and low σ of 6.3×l0 10cm −2. Extending the AsH 3 cover time by 50 times cuts ΔEc to almost 0 eV and increases σ by one order. Interface morphology for long-AsH3 -cover-time samples observed by atomic force microscopy shows a terrace structure on GaAs surface, which means the surface is As rich. These results suggest that an As-poor GaAs surface is essential to achieving high-quality InGaP/GaAs heterointerfaces.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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