Hostname: page-component-cd9895bd7-hc48f Total loading time: 0 Render date: 2024-12-27T02:39:16.139Z Has data issue: false hasContentIssue false

Impact of Various In Situ Preoxidation Process Perturbations on Gate Oxide Quality

Published online by Cambridge University Press:  22 February 2011

P. K. Roy
Affiliation:
AT&T Bell Labs, 555 Union Boulevard, Allentown, PA 18103
M. Weinhoffer
Affiliation:
AT&T Bell Labs, 555 Union Boulevard, Allentown, PA 18103
R. L. Dyas
Affiliation:
AT&T Bell Labs, 555 Union Boulevard, Allentown, PA 18103
S. Meester
Affiliation:
AT&T Bell Labs, 555 Union Boulevard, Allentown, PA 18103
Get access

Abstract

This work describes an orthogonal array (OA8) designed experiment involving several insitu process perturbations during oxidation to develop a 90 Å gate oxide for 0.5μm CMOS technology. The biggest impactors were (i) the insitu preoxidation anneal at oxidation temperature, Tox, (ii) 90% N2 dilution of the ambient during ramp-up, and (iii) lowering the Tox to 850°C. Significant improvements in leakage, breakdown, and wear-out characteristics of the oxide are probably due to the reduction of poor quality ramp oxide grown by 90% N2 dilution and improved Si/SiO2 interfacial substructure attained by the insitu preoxidation anneal.

Type
Research Article
Copyright
Copyright © Materials Research Society 1994

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

[1] Baglee, D. A. and Shah, P. L., in “VLSI Electronics: Microstructure Science,” Einspruch, N. G. and Larrabe, G. B. eds., Academic Press, NY, 7, 165 (1983).Google Scholar
[2] Kern, W. and Puotinen, D. A., RCA Rev., 31, 187 (1970).Google Scholar
[3] Roy, P. K., U. S. Patent 5,147,820 (9/15/92).Google Scholar
[4] Phadke, M. S., “Quality Engineering Using Robust Design,” Prentice Hall, NJ, Chap. 4, 67 (1989).Google Scholar
[5] Cochran, W. T., Semiconductor International, 146 (May 1991).Google Scholar
[6] Roy, P. K. and Sinha, A. K., AT&T Tech. J., 67 (6), 155 (Nov-Dec 1988).Google Scholar
[7] Nicollian, E. H. and Brews, J. R., in “MOS Physics and Technology”, John Wiley & Sons, NY, 435 (1982).Google Scholar