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Published online by Cambridge University Press: 11 February 2011
Integration of dense arrays of high frequency III-V photoemitters and photodetectors with Si platform is one of the challenging tasks for realization of novel chip-level optical interconnects. These interconnects require the resolution of numerous problems of compatibility of materials. Comparison of monolithic and hybrid integration technologies highlights the advantages of hybrid approaches for emitters highly sensitive to growth defects. A novel protocol for fabrication of III-V optoelectronic components on a Si platform is proposed. Reversed vertical cavity surface emitting laser (VCSEL) structures were grown homoepitaxialy by MBE on a GaAs substrate, and then bonded to a Si wafer using a benzocyclobutene (BCB) polymer. The GaAs substrate was subsequently removed by selective etching down to an AlAs etch stop layer. This reduces thermal stresses in order to enhance the optoelectronic device performance and increase lifetime. A 10 μm-thick high frequency VCSEL with coplanar metallization is processed on Si with PMGI reflow planarization. Electro-luminescence spectrum, I-V and P-T characteristics were measured and compared with a reference structure. It was found that measured thermal resistance is about five times higher than for devices on a host GaAs wafer.