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Hot Carrier Effects in Self-aligned and Offset-Gated Polysilicon Thin-Film Transistors

Published online by Cambridge University Press:  01 February 2011

N. Arpatzanis ,
A. T. Hatzopoulos ,
D. H. Tassis ,
Charalambos Dimitriadis  and
G. Kamarinos
N. Arpatzanis
Affiliation:
Department of Physics, Aristotle University of Thessaloniki, 54124 Thessaloniki, Greece
A. T. Hatzopoulos
Affiliation:
Department of Physics, Aristotle University of Thessaloniki, 54124 Thessaloniki, Greece
D. H. Tassis
Affiliation:
Department of Physics, Aristotle University of Thessaloniki, 54124 Thessaloniki, Greece
Charalambos Dimitriadis
Affiliation:
[email protected], Aristotle University of Thessaloniki, Department of Physics, Thessaloniki, Thessaloniki, 54124, Greece
G. Kamarinos
Affiliation:
IMEP ENSERG, 23 rue des Martyrs, BP 257, 38016 Grenoble Cedex 1, France
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Abstract

The effects of hot carriers on the transfer characteristics of self-aligned and offset-gated polysilicon thin-film transistors (TFTs), with channel length L = 10 μm and offset length ΔL = 2 μm, are investigated. In the self-aligned device, the on-state current is substantially reduced, whereas the subthreshold slope remains almost unaffected. In the offset gated device, the transfer characteristic is shifted first positively and then negatively, the on-state current is still substantially reduced and well-defined kinks are formed in the subthreshold region. The device degradation is found to become more pronounced in the offset gated device. A model explaining the post-stress performance of the offset-gated device is presented.

Keywords

polycrystalSielectrical properties
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 888: Symposium V – Materials and Devices for Smart Systems II , 2005 , 0888-V06-17
Copyright
Copyright © Materials Research Society 2006

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References

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