This paper reports the electrical properties of thin-film transistors with pentacene active layers used in a bottom contact transistor geometry utilizing solution processed poly-4-vinylphenol (PVP) as the gate dielectric processed on a polyethylene napthalate (PEN) substrate. The transistors sometimes exhibit mobilities in excess of 1cm2/Vs. The effect of various surface treatments of the gate insulator, on the electrical properties of these transistors discussed. The development of photolithographically defined 2νm channel length bottom contact transistors is emphasized as the speed of circuit elements such as the rectifier scale inversely as the square of the channel length of the transistors. Surface cleaning and semiconductor deposition techniques that improve transistor characteristics and reduce hysteresis are evaluated and the variation of the ION/IOFF ratios with the different surface treatments is noted.