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High Electron Mobility TFTs of Nanocrystalline Silicon Deposited at 150°oC on Plastic Foil

Published online by Cambridge University Press:  17 March 2011

I-Chun Cheng ,
Sigurd Wagner ,
Sanghoon Bae  and
Stephen J. Fonash
I-Chun Cheng
Affiliation:
Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, U.S.A.
Sigurd Wagner
Affiliation:
Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, U.S.A.
Sanghoon Bae
Affiliation:
Nanofabrication Facility, Pennsylvania State University, University Park, PA 16802, U.S.A.
Stephen J. Fonash
Affiliation:
Nanofabrication Facility, Pennsylvania State University, University Park, PA 16802, U.S.A.
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Abstract

Top gate n-channel thin film transistors (TFTs) of nanocrystalline silicon (nc-Si:H) were fabricated on Kapton polyimide film substrates at a maximum process temperature of 15°C. These are thefirst nc-Si:H TFTs ever made on a plastic substrate. Both intrinsic and n+ source/drain layers were directly deposited at 80 MHz excitation frequency for high growth rate. Coplanar TFTs with top source/drains and staggered TFTs with bottom source/drains were made. The coplanar top gate and top source/drain structures have linear electron mobility of ∼ 30 cm2V-1s-1 and ON/OFF ratio up to ∼ 105. TFTs with the top gate and bottom source/drain structure made to date have linear mobility of up to ∼ 12 cm2V-1s-1 and ON/OFF ratio of ∼105.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 664: Symposium A – Amorphous and Heterogeneous Silicon-Based Films-2001 , 2001 , A26.1.1
Copyright
Copyright © Materials Research Society 2001

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