Hostname: page-component-7bb8b95d7b-dtkg6 Total loading time: 0 Render date: 2024-09-13T20:14:43.930Z Has data issue: false hasContentIssue false

Gate Oxide Damage in Dry Photoresist Stripping Environments

Published online by Cambridge University Press:  25 February 2011

Karen H. Sibbett
Affiliation:
Integrated Circuits Laboratory, Stanford University, Stanford, CA 94305
J. Ignacio Ulacia
Affiliation:
Integrated Circuits Laboratory, Stanford University, Stanford, CA 94305
James P. McVittie
Affiliation:
Integrated Circuits Laboratory, Stanford University, Stanford, CA 94305
Richard F. Reichelderfer
Affiliation:
MATRIX Integrated Systems, 4131 Lakeside Drive, Richmond, CA 94806
Get access

Abstract

The effect of oxygen plasma stripping environments on the electrical properties of thin oxides has been studied. A barrel, parallel plate and downstream stripper are compared. Damage, measured by shifts in flatband voltage (Δ Vfb), increases in the density of interface traps (Dit), and degradation in minority carrier lifetimes, was observed in all plasma processed samples. Plasma treated wafers had 10–100 fold increases in Dit but recovered to nearly control levels after a 450 °C anneal. ΔVfb and lifetimes did not recover in all cases. Mobile ion contamination dominated in the high temperature (≥ 250 °C) downstream stripping tool. The mobile ion concentration was halved by decreasing the process temperature in the downstream etcher. Ion bombardment-induced damage appears to be most important in the parallel plate configuration. Lifetime results were poor for wafers etched in an unshielded barrel reactor and did not recover after anneal. Use of an etch tunnel improved results to control levels. Degradation of minority carrier lifetimes measured using the photoconductivity technique correlated well with changes in Vfb and Dit. This measurement provides a simple method for evaluating plasma-induced damage.

Type
Research Article
Copyright
Copyright © Materials Research Society 1987

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFRENCES

[1] Akiya, H., Saito, K. and Kobayashi, K., Jap. J. Appl. Phys. 20 (3), 647655 (1981).Google Scholar
[2] Beguin, A. and Grassionot, G., ECS Proc., Plasma Processing, Denver, Colo., 82 (6), 240249 (1982).Google Scholar
[3] Szekeres, A., Kirov, K. and Alexandrova, S., Phys. Stat. Sol. (a) 62, 727 (1980); 63, 371 (1981).Google Scholar
[4] Curtis, H.W. and Verkuil, R.L., American Society for Testing and Materials ASTM STP 712, 210224 (1980).Google Scholar
[5] Gdula, R. A., IEEE Transactions on Electron Devices ED-26 (4), 644647 (1979).Google Scholar