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Evening Panel Session (November 16, 1983) Soi Technologies for Integrated Circuits

Published online by Cambridge University Press:  22 February 2011

John C. C. Fan
Affiliation:
MIT Lincoln Laboratory, Massachusetts
Y. Akasaka
Affiliation:
Mitsubishi Electric Corporation, Japan
G. W. Cullen
Affiliation:
RCA Laboratories, New Jersey
J. F. Gibbons
Affiliation:
Stanford Electronic Laboratories, California
C. Hill
Affiliation:
Plessey Research Ltd., England
P. J. Vail
Affiliation:
Rome Air Development Center, Massachusetts
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Extract

There are a number of viable approaches to silicon-on-insulator (SOI) technologies, and the panel session has assembled a number of leaders in the SOI community for their views of “SOI Technologies for Integrated Circuits.” Their viewpoints, shown in tabulated form, were presented for general discussion in the session which was attended by about 150 people. Although SOI technologies are useful for many applications, most of the panelists agreed that the most appropriate near-term applications are for high-speed, high-density integrated circuits. Various SOI technologies, including silicon-on-sapphire (SOS), are currently in the running, but the majority of the panelists felt that for SOI technologies to be widely adopted, SOI must be available as a proven manufactured product within two to three years.

Type
Research Article
Copyright
Copyright © Materials Research Society 1984

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