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Engineering Dislocation Dynamics in Inx(AlyGa1−y)1−xP Graded Buffers Grown on Gap by Movpe

Published online by Cambridge University Press:  10 February 2011

A.Y. Kim  and
E.A. Fitzgerald
A.Y. Kim
Affiliation:
Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139
E.A. Fitzgerald
Affiliation:
Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139
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Abstract

To engineer high-quality Inx(AlyGa1−y)1−x P/Ga1−xP graded buffers, we have explored the effects of graded buffer design and MOVPE growth conditions on material quality. We demonstrate that surface roughness causes threading dislocation density (TDD) to increase with continued grading: dislocations and roughness interact in a recursive, escalating cycle to form pileups that cause increasing roughness and dislocation nucleation. Experiments show that V/III ratio, temperature, and grading rate can be used to control dislocation dynamics and surface roughness in InxGa1−xP graded buffers. Control of these parameters individually has resulted in x = 0.34 graded buffers with TDD = 5 × 106 cm−2and roughness = 15 nm and a simple optimization has resulted in TDD = 3 × 106 cm −2and roughness = 10 un. Our most recent work has focused on more sophisticated optimization and the incorporation of aluminum for x > 0.20 to keep the graded buffer completely transparent above 545 nm. Given our results, we expect to achieve transparent, device-quality Inx(AlyGa1−y)1−x P/GaP graded buffers with TDD < 106 cm−2

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 510: Symposium D – Defect & Impurity Engineered Semiconductors & Devices II , January 1998 , 131
Copyright
Copyright © Materials Research Society 1998

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