Electron traps in ALD and MOCVD HfO2 and HfSiO high-k dielectrics were investigated using both conventional DC and pulse measurements. It was found that the traps in the gate stack could be associated with defects of different activation energies and capture cross-sections. This points to potentially different origins of the electrically active defects, which can be either intrinsic or process-related. Structural non-uniformity of the high-k film, associated with grain formation and phase separation, may lead to variation of electrical properties of the gate dielectric along the transistor channel. Effects of such dielectric non-uniformity, as well as electron trapping, on the measured transistor mobility were evaluated.