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Effects of Process Conditions on the Performance of Large Grain Poly-Silicon on Insulator (LPSOI) MOSFET for Advanced CMOS Applications

Published online by Cambridge University Press:  15 March 2011

S. Shivani
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
K. L. Ng
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
C. F. Cheng
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
M. C. Poon
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
Mansun Chan
Affiliation:
Department of Electrical and Electronic Engineering, Hong Kong University of Science & Technology, Sai Kung, Hong Kong
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Abstract

Effects of process annealing temperature on Metal-Induced-Lateral-Crystallization (MILC) growth rate and quality of MILC polysilicon formed were studied. Raman spectrum analysis was employed for material characterization. MILC polysilicon layer, which was formed by applying an optimum annealing condition together with post high temperature annealing, could be used to fabricate Thin-Film-Transistor (TFT) with considerably electrical improvements. This reflected that good quality of the polysilicon layer. It is believed that the proposed MILC formation method can be empolyed to produce large grain polysilicon on insulator (LPSOI) for advanced devices and circuits' fabrication.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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References

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