Hostname: page-component-586b7cd67f-t7czq Total loading time: 0 Render date: 2024-11-25T15:40:20.169Z Has data issue: false hasContentIssue false
  • English
  • Français

Effects of a Post-Emitter RTP on Bipolar NPN Beta Degradation Lifetime for 1.0 Micron & 0.8 Micron BICMOS Processes

Published online by Cambridge University Press:  10 February 2011

W. E. Leitz ,
G. Modi ,
N. Parekh ,
E. Sabin  and
R. V. Taylor
W. E. Leitz
Affiliation:
Silicon Systems, Inc., 2300 Delaware Avenue, Santa Cruz, Ca., 95060
G. Modi
Affiliation:
Silicon Systems, Inc., 2300 Delaware Avenue, Santa Cruz, Ca., 95060
N. Parekh
Affiliation:
Silicon Systems, Inc., 2300 Delaware Avenue, Santa Cruz, Ca., 95060
E. Sabin
Affiliation:
Silicon Systems, Inc., 2300 Delaware Avenue, Santa Cruz, Ca., 95060
R. V. Taylor
Affiliation:
Silicon Systems, Inc., 2300 Delaware Avenue, Santa Cruz, Ca., 95060
Get access

Abstract

Rapid Thermal Processing (RTP) has sometimes been used to increase bipolar NPN Beta (Hfe, or current gain) for a polysilicon emitter BICMOS process. It has been demonstrated that Beta may be increased by 20%, compared to normal non-RTP process values, by the addition of an RTP cycle after the final high temperature furnace step. In our work it was found that emitter-base reverse bias degrades Beta much more severely for a process which uses RTP, than for a non-RTP process. In this paper we will report on the electrical performance effects of RTP on a variety of process parameters. The reliability effects on NPN Beta degradation lifetime, and NMOS reliability effects will be discussed as well.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 429: Symposium N – Rapid Thermal and Integrated Processing V , 1996 , 103
Copyright
Copyright © Materials Research Society 1996

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

[1] Parekh, N. S., Taylor, R. V., and Massetti, D. O., “A simple Method to Control Bipolar Polysilicon Emitter Interfacial Oxide,” J. Electrochem. Soc. Vol.141, No. 11, pp 3167–3172 (1994)Google Scholar
[2] de Jong, J. L., Walczyk, F., “IEEE Bipolar Circuits and Tech. Mtg, Digest, p84 (1989)Google Scholar
[3] Burnett, J., Hu, C., “Modeling Hot-Carrier Effects in Polysilicon Emitter Bipolar Transistors,” IEEE Trans. Elec. Dev., Vol 35 n12, pp2238, (1988)Google Scholar
[4] Burnett, J., “Reliability Issues for Bipolar Transistors and Circuits,” Tutorial Notes 1991 IRPS, pp 7.1 (1991)Google Scholar
[5] Caplan, P. J., Ponidexter, E. H., Vasudev, P. K., and Henderson, R. C., Mat. Res. Symp. Proc. Vol. 76, 1987 Materials Research Society, pp24 1–245 (1987)Google Scholar
[6] Patton, G. L., Bravman, J. C., and Plummer, J. D., “Physics, Technology, and Modeling of Polysilicon Emitter Contacts for VLSI Bipolar Transistors,” IEEE Trans on Elec. Dev., Vol. ED–33, No. 11, pp1754–1768 (1986)Google Scholar
[7] Reuss, R.H., Varker, C.J., Bunevich, P., “Effects of Interfacial Oxide on Hot Carrier Reliability of Polysilicon Emitter npn Transistors,” IEEE 1993 BCTM (1993)Google Scholar
[8] Kosier, S.L., Schrimpf, R.D., Wei, A., DeLaus, M., Fleetwood, D. M., Combs, W. E., “Effects of Oxide Charge and Surface Recombination Velocity on the Excess Base Current of BJT's,” IEEE 1993 BCTM (1993)Google Scholar
[9] Doyle, D.J., Barrett, J.D., Lane, W.A., O'Neill, M., Bain, D., Baker, R., and Mole, P.J., “Comparison of Bipolar NPN Polysilicon Emitter Interface Formation at Three Different Manufacturing Sites,” IEEE Trans. on Semi. Manf., Vol 5 n3, pp 241–247, (1992)Google Scholar
[10] Norishima, M., Iwai, H., Niitsu, Y., and Maeguchi, K., “Impurity Diffusion Behavior of Bipolar Transistor Under Low-Temperature Furnace Annealing and High-Temperature RTA and its Optimization for 0.5 μm Bi-CMOS Process,” IEEE Trans. on Elec. Dev., Vol.39, nl, pp33–40 (1992)Google Scholar
[11] Beck, S. E., Jaccodine, R. J., and Clark, C., “The Ion Implanted Arsenic Tail in Silicon,” Mat. Res. Soc. Symp. Proc. Vol.147. pp73–79 (1989)Google Scholar
[12] Kamgar, A., Baiocchi, F. A., and Sheng, T. T., “Kinetics of arsenic activation and clustering in high dose implanted silicon,” Appl. Phys. Lett. 48 (16), pp 1090–1092 (1986)Google Scholar