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Effect of Temperature on Defect Generation during Copper Chemical Mechanical Planarization

Published online by Cambridge University Press:  01 February 2011

Subrahmanya Mudhivarthi
Affiliation:
Department of Mechanical Engineering Nanomaterials and Nanomaunfacturing Research Center
Parshuram Zantyea
Affiliation:
Department of Mechanical Engineering Nanomaterials and Nanomaunfacturing Research Center
Ashok Kumara
Affiliation:
Department of Mechanical Engineering Nanomaterials and Nanomaunfacturing Research Center
Jeung-Yeop Shim
Affiliation:
Department of Chemical Engineering, University of South Florida, Tampa, FL 33620
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Abstract

Chemical Mechanical Planarization (CMP) is the process of choice for planarization of the constituent layers of the Multi Level Metallization schemes in modern Integrated Circuits. Besides having a lot of advantages, copper CMP process still needs significant process control to eliminate defects such as delamination, microscratches, dishing, erosion etc. In this research, effect of heat generated at the interface on the generation of CMP defects has been investigated. CMP of blanket and patterned samples has been carried out at two conditions of pressure x velocity values with varying slurry temperature. Post CMP metrology is carried out using Atomic force microscopy (AFM) in order to characterize the variation in scratch depth, dishing profile and non-uniformity in step coverage. Pictures of the patterned samples polished at different temperatures are captured using Optical Microscopy (OM) to study the dishing and dissolution of copper lines in greater detail. The primary goal of this study was to gain deeper understanding of the effect of heat generation and rise in temperature at the pad-wafer-slurry interface on CMP induced defectivity.

Type
Research Article
Copyright
Copyright © Materials Research Society 2005

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References

1. Zeidler, D., Stavreva, Z., Plotner, M., and Drescher, K., Microelectron. Eng., 33, 259, (1997).Google Scholar
2. Zantye, P.B., Kumar, A., and Sikder, A., Mater. Sci. Eng. R-Rep., 45 (3-6), 89, (2004).Google Scholar
3. Li, Z., Borucki, L., Koshiyam, I., and Philipossian, A., J. Electrochem. Soc., 151 (7), G482, (2004).Google Scholar
4. Sorooshian, J., DeNardis, D., Charns, L., Li, Z., Shadman, F., Boning, D., Hetherington, D., and Philipossian, A., J. Electrochem. Soc., 151 (2), G85, (2004).Google Scholar
5. White, D., Melvin, J., and Boning, D., J. Electrochem. Soc., 150 (4), G271, (2003).Google Scholar
6. Sorooshian, J., Hetherington, D. and Philipossian, A., Electrochem. Solid State Lett., 7 (10), G222, (2004).Google Scholar
7. Kim, H.J., Kim, H.Y., Jeong, H.D., Lee, E.S., Shin, Y.J., J. Mater. Process. Technol., 130–131, 334, (2002).Google Scholar
8. Ein-Eli, Y., Abelev, E., and Starosvetsky, D., J. Electrochem. Soc., 151 (4), G236, (2004).Google Scholar
9. Mullany, B., Byrne, G., J. Mater. Process. Technol., 132, 28, (2003).Google Scholar