Hostname: page-component-586b7cd67f-t8hqh Total loading time: 0 Render date: 2024-11-25T15:14:42.603Z Has data issue: false hasContentIssue false

Effect of Metal - Silicon Nanowire Contacts on the Performance of Accumulation Metal Oxide Semiconductor Field Effect Transistor

Published online by Cambridge University Press:  01 February 2011

Pranav Garg
Affiliation:
[email protected], Pennsylvania State University, Center for Nanotechnology Education and Utilization, University Park, Pennsylvania, United States
Yi Hong
Affiliation:
[email protected], Pennsylvania State University, Center for Nanotechnology Education and Utilization, University Park, Pennsylvania, United States
Md. Mash-Hud Iqbal
Affiliation:
[email protected], University of Cambridge, Centre for Advanced Photonics and Electronics, Cambridge, United Kingdom
Stephen J. Fonash
Affiliation:
[email protected], Pennsylvania State University, Center for Nanotechnology Education and Utilization, University Park, Pennsylvania, United States
Get access

Abstract

Recently, we have experimentally demonstrated a very simply structured unipolar accumulation-type metal oxide semiconductor field effect transistor (AMOSFET) using grow-in-place silicon nanowires. The AMOSFET consists of a single doping type nanowire, metal source and drain contacts which are separated by a partially gated region. Despite its simple configuration, it is capable of high performance thereby offering the potential of a low manufacturing-cost transistor. Since the quality of the metal/semiconductor ohmic source and drain contacts impacts AMOSFET performance, we repot here on initial exploration of contact variations and of the impact of thermal process history. With process optimization, current on/off ratios of 106 and subthreshold swings of 70 mV/dec have been achieved with these simple devices

Type
Research Article
Copyright
Copyright © Materials Research Society 2009

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1) Cui, Y., Zhong, Z.H, Wang, D.L., Wang, W.U. and Lieber, C.M., Nano Letters 3, 149 (2003).Google Scholar
2) Koo, S.M., Edelstein, M.D., Li, Q., Richter, C.A. and Vogel, E.M., Nanotechnology 16, 1482 (2005).Google Scholar
3) Appenzeller, J., Knoch, J., Tutuc, E., Reuter, M. and Guha, S., 2006 International Electron Devices Meeting, 1 (2006).Google Scholar
4) Wang, Y., Lew, K.-K., Mattzela, J., Redwing, J. M. and Mayer, T. S., 63rd Device Research Conference Proceedings 1, 159 (2005).Google Scholar
5) Fonash, S. J., Iqbal, M. M., Udrea, F., and Migliorato, P., Applied Physics Letters 91, 193508 (2007).Google Scholar
6) Iqbal, M. M., Hong, Y., Garg, P., Udrea, F., Migliorato, P., and Fonash, S. J., IEEE Transactions on Electron Devices 55, 2946 (2008).Google Scholar
7) Shan, Y., Ashok, S., and Fonash, S. J., Applied Physics Letters 91, 093518 (2007).Google Scholar
8) Shan, Y. and Fonash, S. J., ACS Nano 2, 429 (2008).Google Scholar
9) Sze, S. M. and Ng, Kwok K., Physics of Semiconductor Devices, 3rd ed. (John Wiley & Sons, Inc., Hoboken, New Jersey, 2007) p. 179.Google Scholar
10) Wang, Y., Cabassi, M., Ho, T., Lew, K-K, Redwing, J., and Mayer, T., 62nd Device Research Conference Proceedings 1, 23 (2004).Google Scholar