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Deuterium Sintering of CMOS Technology for Improved Hot Carrier Reliability

Published online by Cambridge University Press:  10 February 2011

J. Lee ,
Z. Chen ,
K. Hess  and
J.W. Lyding
J. Lee
Affiliation:
Department of Electrical and Computer Engineering, University of Illinois and Beckman Institute, Urbana, IL 61801, [email protected]
Z. Chen
Affiliation:
Department of Electrical and Computer Engineering, University of Illinois and Beckman Institute, Urbana, IL 61801
K. Hess
Affiliation:
Department of Electrical and Computer Engineering, University of Illinois and Beckman Institute, Urbana, IL 61801
J.W. Lyding
Affiliation:
Department of Electrical and Computer Engineering, University of Illinois and Beckman Institute, Urbana, IL 61801
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Abstract

It has been found that deuterium (D) instead of hydrogen (H) can be used to greatly strengthen the resistance of metal oxide semiconductor (MOS) transistors against hot carrier induced degradation. We have applied the new deuterium sintering process to CMOS technology and have obtained significantly improved hot carrier reliability resulting from the isotope effect. We will present a summary of these lifetime improvements from five different transistor structures of five different manufacturers, as well as the physical and electrical characterizations of the deuterium sintering process.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 510: Symposium D – Defect & Impurity Engineered Semiconductors & Devices II , January 1998 , 301
Copyright
Copyright © Materials Research Society 1998

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References

1. Lyding, J.W., Shen, T.C., Hubacek, J.S., Tucker, J.R., and Abeln, G.C., Appl. Phys. Lett. 64, p. 2010 (1994).Google Scholar
2. Avouris, Ph., Walkup, R.E., Rosi, A., Shen, T.C., Abeln, G.C., Tucker, J.R., and Lyding, J.W., Chem. Phys. Lett. 257, p. 148 (1996).Google Scholar
3. Van de Walle, C.G. and Jackson, W.B., Appl. Phys. Lett., 69, p. 2441 (1996).Google Scholar
4. Adams, A.C., in Dielectric and polysilicon film deposition VLSI technology, edited by Sze, S.M. (McGraw-Hill, New York, 1983).Google Scholar
5. Lyding, J.W., Hess, K. and Kizilyalli, I.C., Appl. Phys. Lett., 68, p. 2526 (1996).Google Scholar
6. Kizilyalli, I.C., Lyding, J.W., and Hess, K., IEEE Electron Device Lett., 18, p. 81, (1997).Google Scholar
7. Lee, J., Baker, J., Wilson, R., and Lyding, J.W. in Secondary Ion Mass Spectrometry, edited by Gillen, G., Lareau, R., Bennett, J., and Stevie, F. (SIMS XI Proc. Orlando, FL 1997), pp. 205–208.Google Scholar
8. Chen, Z., Lee, J., Lyding, J.W., and Hess, K., will be presented at VLSI Symposium June, 1998.Google Scholar
9. Devine, R.A.B., Autran, J.L., Warren, W.L. and Vanheusden, K.L., and Rostaing, J.C., Appl. Phys. Lett. 70, 2999 (1997).Google Scholar
10. Ipatova, I., Chikalova-Luzina, O.P., and Hess, K., J. Appl. Phys. 83, 814 (1998).Google Scholar